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参数资料
| 型号： | ADP2106ACPZ-1.8-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 22/36页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1.8V 16LFCSP |
| 产品培训模块： | Powering 90nm/65nm FPGAs and Processors |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1.8V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.2MHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘，CSP |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-LFCSP-VQ |
| 其它名称： | ADP2106ACPZ-1.8-R7DKR |
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P TRAN =
× I OUT × ( t ON + t OFF ) × f SW
ADP2105/ADP2106/ADP2107
EFFICIENCY CONSIDERATIONS
Efficiency is the ratio of output power to input power. The high
efficiency of the ADP2105/ADP2106/ADP2107 has two distinct
advantages. First, only a small amount of power is lost in the dc-
to-dc converter package that reduces thermal constraints. Second,
the high efficiency delivers the maximum output power for the
given input power, extending battery life in portable applications.
There are four major sources of power loss in dc-to-dc
converters like the ADP2105/ADP2106/ADP2107:
? Power switch conduction losses
? Inductor losses
? Switching losses
? Transition losses
Power Switch Conduction Losses
Power switch conduction losses are caused by the flow of output
current through the P-channel power switch and the N-channel
synchronous rectifier, which have internal resistances ( R DS(ON) )
associated with them. The amount of power loss can be approxi-
mated by
P SW ? COND = [ R DS(ON) ? P × D + R DS(ON) ? N × (1 ? D )] × I OUT2
where D = V OUT /V IN .
The internal resistance of the power switches increases with
and Figure 21 show the change in R DS(ON) vs. input voltage,
whereas Figure 29 and Figure 30 show the change in R DS(ON) vs.
temperature for both power devices.
Inductor Losses
Inductor conduction losses are caused by the flow of current
through the inductor, which has an internal resistance (DCR)
associated with it. Larger sized inductors have smaller DCR,
which can improve inductor conduction losses.
Inductor core losses are related to the magnetic permeability of
the core material. Because the ADP2105/ADP2106/ADP2107
are high switching frequency dc-to-dc converters, shielded ferrite
core material is recommended for its low core losses and low EMI.
The total amount of inductor power loss can be calculated by
P L = DCR × I OUT2 + Core Losses
Switching Losses
Switching losses are associated with the current drawn by the
driver to turn on and turn off the power devices at the
switching frequency. Each time a power device gate is turned on
and turned off, the driver transfers a charge ΔQ from the input
supply to the gate and then from the gate to ground.
The amount of power loss can by calculated by
P SW = ( C GATE ? P + C GATE ? N ) × V IN2 × f SW
Data Sheet
Transition Losses
Transition losses occur because the P-channel MOSFET power
switch cannot turn on or turn off instantaneously. At the middle of
an LX (switch) node transition, the power switch is providing all
the inductor current, while the source to drain voltage of the
power switch is half the input voltage, resulting in power loss.
Transition losses increase with load current and input voltage
and occur twice for each switching cycle.
The amount of power loss can be calculated by
V IN
2
where t ON and t OFF are the rise time and fall time of the LX
(switch) node, and are both approximately 3 ns.
THERMAL CONSIDERATIONS
In most applications, the ADP2105/ADP2106/ADP2107 do not
dissipate a lot of heat due to their high efficiency. However, in
applications with high ambient temperature, low supply voltage,
and high duty cycle, the heat dissipated in the package is large
enough that it can cause the junction temperature of the die to
exceed the maximum junction temperature of 125°C. Once the
junction temperature exceeds 140°C, the converter goes into
thermal shutdown. To prevent any permanent damage it recovers
only after the junction temperature has decreased below 100°C.
Therefore, thermal analysis for the chosen application solution
is very important to guarantee reliable performance over all
conditions.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to the power dissipation, as shown in the following
equation:
T J = T A + T R
where:
T J is the junction temperature.
T A is the ambient temperature.
T R is the rise in temperature of the package due to the power
dissipation in the package.
The rise in temperature of the package is directly proportional
to the power dissipation in the package. The proportionality
constant for this relationship is defined as the thermal resistance
from the junction of the die to the ambient temperature, as
shown in the following equation:
T R = θ JA × P D
where:
T R is the rise in temperature of the package.
P D is the power dissipation in the package.
θ JA is the thermal resistance from the junction of the die to the
ambient temperature of the package.
where:
( C GATE ? P + C GATE ? N ) ≈ 600 pF.
f SW = 1.2 MHz, the switching frequency.
Rev. D | Page 22 of 36
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