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参数资料
| 型号： | ADP3419JRMZ-REEL |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/10页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DVR DUAL BOOTST 10MSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 配置： | 高端和低端，同步 |
| 输入类型： | PWM |
| 延迟时间： | 32ns |
| 电流 - 峰： | 1A |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 30V |
| 电源电压： | 4.6 V ~ 6 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 标准包装 |
| 产品目录页面： | 1128 (CN2011-ZH PDF) |
| 其它名称： | ADP3419JRMZ-REELDKR |
ADP3419
When DRVLSD is low, the low-side driver stays low.
When DRVLSD is high, the low-side driver is enabled and
controlled by the driver signals, as previously described.
4.7 m F multilayer ceramic (MLC) capacitor. MLC
capacitors provide the best combination of low ESR and
small size, and can be obtained from the following vendors.
Low-Side Driver Timeout
In normal operation, the DRVH signal tracks the IN signal
and turns off the Q1 high-side switch with a few 10 ns delay
(t pdlDRVH ) following the falling edge of the input signal.
When Q1 is turned off, DRVL is allowed to go high, Q2 turns
Table 2.
Vendor
Murata
Taiyo-Yuden
Part Number
GRM235Y5V106Z16
EMK325F106ZF
Web Address
www.murata.com
www.t-yuden.com
Q HSGATE
D V BST
on, and the SW node voltage collapses to zero. But in a fault
condition such as a high-side Q1 switch drain-source short
circuit, the SW node cannot fall to zero, even when DRVH
goes low. The ADP3419 has a timer circuit to address this
scenario. Every time the IN goes low, a DRVL on-time delay
timer is triggered. If the SW node voltage does not trigger a
low-side turn-on, the DRVL on-time delay circuit does it
instead, when it times out with t SW(TO) delay. If Q1 is still
turned on, that is, its drain is shorted to the source, Q2 turns
on and creates a direct short circuit across the V DCIN voltage
rail. The crowbar action causes the fuse in the V DCIN current
path to open. The opening of the fuse saves the load (CPU)
from potential damage that the high-side switch short circuit
could have caused.
Crowbar Function
In addition to the internal low-side drive time-out circuit,
the ADP3419 includes a CROWBAR input pin to provide a
means for additional overvoltage protection. When
CROWBAR goes high, the ADP3419 turns off DRVH and
turns on DRVL. The crowbar logic overrides the overlap
protection circuit, the shutdown logic, the DRVLSD logic,
and the UVLO protection on DRVL. Thus, the crowbar
function maximizes the overvoltage protection coverage in
the application. The CROWBAR can be either driven by the
CLAMP pin of buck controllers, such as the ADP3422,
ADP3203, ADP3204, or ADP3205, or controlled by an
independent overvoltage monitoring circuit.
Tokin C23Y5V1C106ZP www.tokin.com
Keep the ceramic capacitor as close as possible to the ADP3419.
Bootstrap Circuit
The bootstrap circuit uses a charge storage capacitor
(C BST ) and a Schottky diode (D1), as shown in Figure 16.
Selection of these components can be done after the
high-side MOSFET has been chosen. The bootstrap
capacitor must have a voltage rating that is able to handle at
least 5.0 V more than the maximum supply voltage. The
capacitance is determined by:
C BST + (eq. 1)
where:
Q HSGATE is the total gate charge of the high-side MOSFET.
D V BST is the voltage droop allowed on the high-side
MOSFET drive.
For example, two IRF7811 MOSFETs in parallel have a
total gate charge of about 36 nC. For an allowed droop of
100 mV, the required bootstrap capacitance is 360 nF. A
good quality ceramic capacitor should be used, and derating
for the significant capacitance drop of MLCs at high
temperature must be applied. In this example, selection of
470 nF or even 1 m F would be recommended.
A Schottky diode is recommended for the bootstrap diode
due to its low forward drop, which maximizes the drive
available for the high-side MOSFET. The bootstrap diode
Table 1. ADP3419 Truth Table
CROWBAR UVLO SD DRVLSD
IN
DRVH
DRVL
must also be able to handle at least 5.0 V more than the
maximum battery voltage. The average forward current can
be estimated by:
L
L
H
H
H
H
L
I F(AVG) + Q HSGATE
f MAX
(eq. 2)
L
L
L
L
L
H
H
* = Don’t Care.
L
L
L
L
H
L
H
H
H
H
L
*
*
*
H
L
L
*
*
*
*
L
H
L
*
*
*
*
L
H
L
L
L
L
L
H
L
L
L
L
H
H
where f MAX is the maximum switching frequency of the
controller.
Power and Thermal Considerations
The major power consumption of the ADP3419-based
driver circuit is from the dissipation of MOSFET gate
charge. It can be estimated as:
P MAX [ VCC (Q HSGATE ) Q LSGATE ) f MAX (eq. 3)
where:
VCC is the supply voltage 5.0 V.
Application Information
Supply Capacitor Selection
For the supply input (VCC) of the ADP3419, a local
bypass capacitor is recommended to reduce the noise and to
supply some of the peak currents drawn. Use a 10 m F or
f MAX is the highest switching frequency.
Q HSGATE and Q LSGATE are the total gate charge of high-side
and low-side MOSFETs, respectively.
For example, the ADP3419 drives two IRF7821 high-side
MOSFETs and two IRF7832 low-side MOSFETs. According
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP3419JRMZ-REEL1 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Bootstrapped, High Voltage MOSFET Driver with Output Disable |
| ADP34200002RUR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP3421 | 制造商:AD 制造商全称:Analog Devices 功能描述:Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3421JRU | 制造商:AD 制造商全称:Analog Devices 功能描述:Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3421JRU-REEL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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