参数资料
型号: ADP3419JRMZ-REEL
厂商: ON Semiconductor
文件页数: 9/10页
文件大小: 0K
描述: IC MOSFET DVR DUAL BOOTST 10MSOP
产品变化通告: MFG CHG Notification ADI to ON Semi
标准包装: 1
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 32ns
电流 - 峰: 1A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 30V
电源电压: 4.6 V ~ 6 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 标准包装
产品目录页面: 1128 (CN2011-ZH PDF)
其它名称: ADP3419JRMZ-REELDKR
ADP3419
to the MOSFET data sheets, Q HSGATE = 18.6 nC and
Q LSGATE = 68 nC. Given that f MAX is 300 kHz, P MAX would
be about 130 mW.
Part of this power consumption generates heat inside the
ADP3419. The temperature rise of the ADP3419 against its
environment is estimated as:
The total MOSFET drive power dissipates in the output
resistance of ADP3419 and in the MOSFET gate resistance
as well. η represents the ratio of power dissipation inside the
ADP3419 over the total MOSFET gate driving power. For
normal applications, a rough estimation for η is 0.7. A more
accurate estimation can be calculated using:
D T [ q JA
P MAX
h
(eq. 4)
where θ JA is ADP3419’s thermal resistance from junction
to air, given in the absolute maximum ratings as 220 ° C/W
for a 4 ? layer board.
h [
Q HSGATE
Q HSGATE ) Q LSGATE
0.5 R1
R1 ) R HSGATE ) R
)
0.5 R2
R2 ) R HSGATE
)
Q LSGATE
Q HSGATE ) Q LSGATE
0.5 R3
R3 ) R LSGATE
)
0.5 R4
R4 ) R LSGATE
(eq. 5)
where:
R1 and R2 are the output resistances of the high-side driver:
R1 = 1.7 (DRVH ? BST), R2 = 0.8 (DRVH ? SW).
R3 and R4 are the output resistances of the low-side driver:
R3 = 1.7 (DRVL ? VCC), R4 = 0.8 (DRVL ? GND).
R is the external resistor between the BST pin and the BST
capacitor.
R HSGATE and R LSGATE are gate resistances of high-side and
low-side MOSFETs, respectively.
Assuming that R = 0 and that R HSGATE = R LSGATE = 0.5,
Equation 5 gives a value of η = 0.71. Based on Equation 4,
the estimated temperature rise in this example is about 22 ° C.
PC Board Layout Considerations
Use the following general guidelines when designing
printed circuit boards. Figure 17 gives an example of the
typical land patterns based on the guidelines given here.
? The VCC bypass capacitor should be located as close as
possible to the VCC and GND pins. Place the
ADP3419 and bypass capacitor on the same layer of the
? It is best to have the low-side MOSFET gate close to
the DRVL pin; otherwise, use a short and very thick
PCB trace between the DRVL pin and the low-side
MOSFET gate.
? Fast switching of the high-side MOSFET can reduce
switching loss. However, EMI problems can arise due
to the severe ringing of the switch node voltage.
Depending on the character of the low-side MOSFET, a
very fast turn-on of the high-side MOSFET may falsely
turn on the low-side MOSFET through the dv/dt
coupling of its Miller capacitance. Therefore, when fast
turn-on of the high-side MOSFET is not required by the
application, a resistor of about 1 W to 2 W can be placed
between the BST pin and the BST capacitor to limit the
turn-on speed of the high-side MOSFET.
D1
board, so that the PCB trace between the ADP3419
VCC pin and the MLC capacitor does not contain any
R BST
C BST
via. An ideal location for the bypass MLC capacitor is
near Pin 5 and Pin 6 of the ADP3419.
? High frequency switching noise can be coupled into the
VCC pin of the ADP3419 via the BST diode.
Therefore, do not connect the anode of the BST diode
to the VCC pin with a short trace. Use a separate via or
trace to connect the anode of the BST diode directly to
the VCC 5.0 V power rail.
ORDERING INFORMATION
TO SWITCH
NODE
SHORT, THICK TRACE
TO THE GATES OF
LOW-SIDE MOSFETS
C VCC
Figure 17. External Component Placement Example
Device Number
ADP3419JRM ? REEL
ADP3419JRMZ ? REEL
ADP34190091RMZR
Branding
P9A
P9B
P9B
Package Type
10 ? Lead MSOP
10 ? Lead MSOP
10 ? Lead MSOP
Shipping ?
3000 Tape & Reel
3000 Tape & Reel
3000 Tape & Reel
?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*The “Z’’ suffix indicates Pb ? Free part.
http://onsemi.com
9
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