参数资料
型号: ADP5588ACPZ-R7
厂商: Analog Devices Inc
文件页数: 26/28页
文件大小: 0K
描述: IC KEYPAD SCANNER GPIO PORT EXP
标准包装: 1
应用: 键盘和警报系统
接口: I²C
电源电压: 1.8 V ~ 3 V
封装/外壳: 24-VFQFN 裸露焊盘,CSP
供应商设备封装: 24-LFCSP-VQ(4x4)
包装: 标准包装
安装类型: 表面贴装
产品目录页面: 799 (CN2011-ZH PDF)
其它名称: ADP5588ACPZ-R7DKR
Data Sheet
ADP5588
Rev. C | Page 7 of 28
THEORY OF OPERATION
CONTROL
REGISTERS
CONTROL
INTERFACE
REF
VOLTAGE
C9
C8
R7
R6
R5
R4
R3
R2
R1
R0
C0
C1
C2
C3
C4
C5
C6
C7
C9
C8
A0
A1
A2
A3
A4
A5
A6
A7
B0
B1
B2
B3
B4
B5
B6
B7
C0
C1
C2
C3
C4
C5
C6
C7
D0
D1
D2
D3
D4
D5
D6
D7
E0
E1
E2
E3
E4
E5
E6
E7
F0
F1
F2
F3
F4
F5
F6
F7
G0
G1
G2
G3
G4
G5
G6
G7
H0
H1
H2
H3
H4
H5
H6
H7
I0
I1
I2
I3
I4
I5
I6
I7
J0
J1
J2
J3
J4
J5
J6
J7
SCL
SDA
RST
INT
VCC
GND
VCC
SCL
SDA
19
21
23
22
18
17
20
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
REF
VOLTAGE
0.1F
VCC
07673-
009
ADP5588
RST
INT
Figure 4. Typical Operating Circuit
The ADP5588 is a GPIO expander that can be configured either
as an 18-I/O port expander or as a 10 column × 8 row keypad
matrix (80 keys maximum). It is ideal for cellular phone designs
and other portable devices that require a large extended keypad
and/or expanded I/Os (see the Applications Information section
for various configurations). When smaller size keypads are
required, unused GPIOs in the keypad matrix can be used as
I/Os (GPOs and GPIs). Two of the columns (C8 and C9) can
also be configured as comparator inputs for single or dual light
sensors. All GPIOs (rows and columns) default as GPIs at power-
up with pull-ups and debounce enabled.
KEYPAD OPERATION
Any number of rows and columns, up to 10 columns × 8 rows,
can be configured to be part of the keypad matrix. The rows
and columns that make up the keypad matrix must be con-
figured by setting the corresponding bits in Register 0x1D
through Register 0x1F. Keys on the keypad matrix appear on
the key event table with a decimal value of 1 (0x01 hexidecimal
or 0000001 binary) and run through 80 decimals (0x50 hexi-
decimal or 1010000 binary). See Table 10 for key event number
assignments. The keypad, in idle mode, is configured with
columns being driven low and rows as inputs high with pull-ups.
Table 10. Key Event Number Assignment Table
Row
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
R0
1
2
4
5
6
7
8
9
10
R1
11
12
13
14
15
16
17
18
19
20
R2
21
22
23
24
25
26
27
28
29
30
R3
31
32
33
34
35
36
37
38
39
40
R4
41
42
43
44
45
46
47
48
49
50
R5
51
52
53
54
55
56
57
58
59
60
R6
61
62
63
64
65
66
67
68
69
70
R7
71
72
73
74
75
76
77
78
79
80
When one key press or multiple key presses (short between
coumn and row) occur, the internal state machine checks the
row pins to determine which one is driven low and then triggers
an interrupt. The state machine then starts a key scan cycle to
determine which keys are pressed. After a key has been pressed
for 25 ms, the state machine sets the appropriate key(s) in the
key event status register with the key-pressed bits set (the MSB
in the key event register) in the order detected. If the KE_IEN
field in Register 0x01 is set, the state machine then sets the
KE_INT field in Register 0x01 and generates an interrupt to the
host processor.
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