参数资料
型号: ADS1217IPFBR
英文描述: 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER
中文描述: 8通道,24位模拟数字转换器
文件页数: 20/28页
文件大小: 458K
代理商: ADS1217IPFBR
ADS1217
SBAS260B
20
www.ti.com
STOPC
Stop Continuous
Description:
Ends the continuous data output mode.
Operands:
None
Bytes:
1
Encoding:
0000 1111
Data Transfer Sequence:
RREG
Read from Registers
Description:
Output the data from up to 16 registers starting
with the register address specified as part of the instruction.
The number of registers read will be one plus the second byte.
If the count exceeds the remaining registers, the addresses will
wrap back to the beginning.
Operands:
Bytes:
Encoding:
Data Transfer Sequence:
Read Two Registers Starting from Register 01
H
(MUX)
r, n
2
0001 rrrr xxxx nnnn
RRAM
Read from RAM
Description:
Up to 128 bytes can be read from RAM starting
at the bank specified in the op code. All reads start at the
address for the beginning of the RAM bank. The number of
bytes to read will be one plus the value of the second byte.
Operands:
Bytes:
Encoding:
Data Transfer Sequence:
Read Two RAM Locations Starting from 20
H
a, n
2
0010 0aaa xnnn nnnn
CREG
Copy Registers to RAM Bank
Description:
Copy the 16 control registers to the RAM bank
specified in the op code. Refer to timing specifications for
command execution time.
Operands:
a
Bytes:
1
Encoding:
0100 0aaa
Data Transfer Sequence:
Copy Register Values to RAM Bank 3
CREGA
Copy Registers to All RAM Banks
Description:
Duplicate the 16 control registers to all the RAM
banks. Refer to timing specifications for command execution
time.
Operands:
None
Bytes:
1
Encoding:
0100 1000
Data Transfer Sequence:
WREG
Write to Register
Description:
Write to the registers starting with the register
specified as part of the instruction. The number of registers that
will be written is one plus the value of the second byte.
Operands:
r, n
Bytes:
2
Encoding:
0101 rrrr xxxx nnnn
Data Transfer Sequence:
Write Two Registers Starting from 06
H
(DIO)
D
IN
0000 1111
NOTE: (1) For wait time, refer to timing specification.
D
IN
0001 0001
0000 0001
xxxx xxxx
xxxx xxxx
D
OUT
MUX
ACR
(1)
D
IN
0010 0010
x000 0001
xxxx xxxx
xxxx xxxx
D
OUT
RAM Data
20
H
RAM Data
21
H
(1)
D
IN
0100 0011
D
IN
0100 1000
0101 0110
xxxx 0001
Data for DIO
Data for DIR
D
IN
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