- 您现在的位置：买卖IC网 > PDF目录298814 > ADS1252U/2K5 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO8 PDF资料下载
参数资料
| 型号： | ADS1252U/2K5 |
| 元件分类： | ADC |
| 英文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO8 |
| 封装： | SO-8 |
| 文件页数： | 6/14页 |
| 文件大小： | 131K |
| 代理商： | ADS1252U/2K5 |
14
ADS1252
DEFINITION OF TERMS
An attempt has been made to be consistent with the termi-
nology used in this data sheet. In that regard, the definition
of each term is given as follows:
Analog Input Differential Voltage—for an analog signal
that is fully differential, the voltage range can be compared
to that of an instrumentation amplifier. For example, if both
analog inputs of the ADS1252 are at 2.048V, the differential
voltage is 0V. If one analog input is at 0V and the other
analog input is at 4.096V, then the differential voltage
magnitude is 4.096V. This is the case regardless of which
input is at 0V and which is at 4.096V. The digital output
result, however, is quite different. The analog input differen-
tial voltage is given by the following equation:
+VIN – –VIN
A positive digital output is produced whenever the analog
input differential voltage is positive, while a negative digital
output is produced whenever the differential is negative. For
example, a positive full-scale output is produced when the
converter is configured with a 4.096V reference, and the
analog input differential is 4.096V. The negative full-scale
output is produced when the differential voltage is –4.096V.
In each case, the actual input voltages must remain within
the XGND to +VDD range.
Actual Analog Input Voltage—the voltage at any one
analog input relative to GND.
Full-Scale Range (FSR)—as with most A/D converters, the
full-scale range of the ADS1252 is defined as the “input”
which produces the positive full-scale digital output minus
the “input” which produces the negative full-scale digital
output. For example, when the converter is configured with
a 4.096V reference, the differential full-scale range is:
[4.096V (positive full scale) – (–4.096V) (negative full scale)] = 8.192V
Least Significant Bit (LSB) Weight—this is the theoretical
amount of voltage that the differential voltage at the analog
input would have to change in order to observe a change in
the output data of one least significant bit. It is computed as
follows:
LSB Weight
Full Scale Range
N
=
2
where N is the number of bits in the digital output.
Conversion Cycle—as used here, a conversion cycle refers
to the time period between DOUT/DRDY pulses.
Effective Resolution (ER)—of the ADS1252 in a particular
configuration can be expressed in two different units:
bits rms (referenced to output) and
Vrms (referenced to
input). Computed directly from the converter's output data,
each is a statistical calculation based on a given number of
results. Noise occurs randomly; the rms value represents a
statistical measure which is one standard deviation. The ER
in bits can be computed as follows:
ER in bits rms =
20
log
2
V
Vrms noise
REF
6 02
.
The 2 VREF figure in each calculation represents the full-
scale range of the ADS1252. This means that both units are
absolute expressions of resolution—the performance in dif-
ferent configurations can be directly compared, regardless of
the units.
Noise Reduction—for random noise, the ER can be im-
proved with averaging. The result is the reduction in noise
by the factor
√N, where N is the number of averages, as
shown in Table IV. This can be used to achieve true 24-bit
performance at a lower data rate. To achieve 24 bits of
resolution, more than 24 bits must be accumulated. A 36-bit
accumulator is required to achieve an ER of 24 bits. The
following uses VREF = 4.096V. With the ADS1252 output-
ting data at 40kHz, a 4096 point average will take 102.4ms.
The benefits of averaging will be degraded if the input signal
drifts during that 100ms.
N
NOISE
ER
(NUMBER
REDUCTION
IN
OF AVERAGES)
FACTOR
VRMS
BITS RMS
1
31.3
V18
2
1.414
22.1
V
18.5
4
2
15.6
V19
8
2.82
11.1
V
19.5
16
4
7.82
V20
32
5.66
5.53
V
20.5
64
8
3.91
V21
128
11.3
2.77
V
21.5
256
16
1.96
V22
512
22.6
1.38
V
22.5
1024
32
978nV
23
2048
45.25
692nV
23.5
4096
64
489nV
24
TABLE IV. Averaging.
相关PDF资料 |
PDF描述 |
|---|---|
| ADS1298RIZXGT | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| ADSP-1401TN/883B | 16-BIT, MICROPROGRAM SEQUENCER, PDIP48 |
| ADSP-21160NCB-100 | 64-BIT, 50 MHz, OTHER DSP, PBGA400 |
| ADSP-21365YSWZ-2BA | 16-BIT, 55.55 MHz, OTHER DSP, PQFP144 |
| ADSP-2181BS-160 | 24-BIT, 20 MHz, OTHER DSP, PQFP128 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS1252UG4 | 功能描述:模数转换器 - ADC ResolutionPlus 24-Bit 40kHz RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1253 | 制造商:TI 制造商全称:Texas Instruments 功能描述:24-Bit, 20kHz, Low Power ANALOG-TO-DIGITAL CONVERTER |
| ADS1253E | 功能描述:模数转换器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1253E/2K5 | 功能描述:模数转换器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1253E/2K5G4 | 功能描述:模数转换器 - ADC 24-Bit 20kHz Low Power RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。