参数资料
型号: ADSP-2181BSTZ-133
厂商: Analog Devices Inc
文件页数: 8/32页
文件大小: 0K
描述: IC DSP CONTROLLER 16BIT 128TQFP
产品变化通告: Mold Change 11/Jul/2012
标准包装: 1
系列: ADSP-21xx
类型: 定点
接口: 同步串行端口(SSP)
时钟速率: 33.3MHz
非易失内存: 外部
芯片上RAM: 80kB
电压 - 输入/输出: 5.00V
电压 - 核心: 5.00V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 托盘
REV. D
ADSP-2181
–16–
Parameter
Min
Max
Unit
Bus Request/Grant
Timing Requirements:
tBH
BR Hold after CLKOUT High1
0.25tCK + 2
ns
tBS
BR Setup before CLKOUT Low1
0.25tCK + 17
ns
Switching Characteristics:
tSD
CLKOUT High to
xMS,
0.25tCK + 10
ns
RD, WR Disable
tSDB
xMS, RD, WR
Disable to
BG Low
0
ns
tSE
BG High to xMS,
RD, WR Enable
0
ns
tSEC
xMS, RD, WR
Enable to CLKOUT High
0.25tCK – 4
ns
tSDBH
xMS, RD, WR
Disable to
BGH Low2
0ns
tSEH
BGH High to xMS,
RD, WR Enable2
0ns
NOTES
xMS = PMS, DMS, CMS, IOMS, BMS.
1
BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on
the following cycle. Refer to the ADSP-2100 Family User’s Manual, Third Edition for
BR/BG cycle relationships.
2
BGH is asserted when the bus is granted and the processor requires control of the bus to continue.
CLKOUT
tSD
tSDB
tSE
tSEC
tSDBH
tSEH
tBS
BR
tBH
CLKOUT
PMS, DMS
BMS, RD
WR
BG
BGH
Figure 10. Bus Request–Bus Grant
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