参数资料
型号: ADSP-BF532SBBCZ400
厂商: Analog Devices Inc
文件页数: 19/64页
文件大小: 0K
描述: IC DSP CTLR 16B 400MHZ 160CSPBGA
产品培训模块: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: SPI,SSP,UART
时钟速率: 400MHz
非易失内存: ROM(1 kB)
芯片上RAM: 84kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 160-LFBGA,CSPBGA
供应商设备封装: 160-CSPBGA(12x12)
包装: 托盘
配用: ADZS-BF533-EZLITE-ND - KIT W/BOARD EVAL FOR ADSP-BF533
ADSP-BF531 / ADSP-BF532 / ADSP-BF533
Table 9. Pin Descriptions (Continued)
Driver
Pin Name
Type Function
Type 1
RFS1
DR1PRI
DR1SEC
TSCLK1
TFS1
DT1PRI
DT1SEC
I/O
I
I
I/O
I/O
O
O
SPORT1 Receive Frame Sync
SPORT1 Receive Data Primary
SPORT1 Receive Data Secondary
SPORT1 Transmit Serial Clock
SPORT1 Transmit Frame Sync
SPORT1 Transmit Data Primary
SPORT1 Transmit Data Secondary
C
D
C
C
C
UART Port
RX
I
UART Receive
TX
O
UART Transmit
C
Real-Time Clock
RTXI
RTXO
Clock
CLKIN
XTAL
Mode Controls
RESET
NMI
BMODE1–0
Voltage Regulator
VROUT1–0
I
O
I
O
I
I
I
O
RTC Crystal Input (This pin should be pulled low when not used.)
RTC Crystal Output (Does not three-state in hibernate.)
Clock/Crystal Input (This pin needs to be at a level or clocking.)
Crystal Output
Reset (This pin is always active during core power-on.)
Nonmaskable Interrupt (This pin should be pulled low when not used.)
Boot Mode Strap (These pins must be pulled to the state required for the desired boot mode.)
External FET Drive (These pins should be left unconnected when unused and are driven high
during hibernate.)
Supplies
V DDEXT
V DDINT
V DDRTC
GND
P
P
P
G
I/O Power Supply
Core Power Supply
Real-Time Clock Power Supply (This pin should be connected to V DDEXT when not used and should
remain powered at all times.)
External Ground
1
Refer to Figure 33 on Page 43 to Figure 44 on Page 44 .
Rev. I
|
Page 19 of 64 |
August 2013
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