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| 型号： | ADSP-BF561SBB600 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 42/64页 |
| 文件大小： | 0K |
| 描述： | IC DSP 32BIT 600MHZ 297-BGA |
| 产品培训模块： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 标准包装： | 1 |
| 系列： | Blackfin® |
| 类型： | 定点 |
| 接口： | SPI，SSP，UART |
| 时钟速率： | 600MHz |
| 非易失内存： | 外部 |
| 芯片上RAM： | 328kB |
| 电压 - 输入/输出： | 2.50V，3.30V |
| 电压 - 核心： | 1.35V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 297-BGA |
| 供应商设备封装： | 297-PBGA（27x27） |
| 包装： | 托盘 |
| 配用： | ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN ADZS-BF561-EZLITE-ND - BOARD EVAL ADSP-BF561 ADZS-BF561-MMSKIT-ND - KIT STARTER MULTIMEDIA BF561 ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT |
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ADSP-BF561
100
POWER DISSIPATION
80
60
40
20
0
–20
–40
–60
–80
–100
V DDEXT = 3.65V
V DDEXT = 3.30V
V DDEXT = 2.95V
V OH
V OL
Many operating conditions can affect power dissipation. System
designers should refer to Estimating Power for ADSP-BF561
Blackfin Processors (EE-293) on the Analog Devices website
( www.analog.com )—use site search on “EE-293.” This docu-
ment provides detailed information for optimizing your design
for lowest power.
See the ADSP-BF561 Blackfin Processor Hardware Reference
Manual for definitions of the various operating modes and for
instructions on how to minimize system power.
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
shows the measurement point for ac measurements (except out-
100
SOURCE VOLTAGE (V)
Figure 34. Drive Current C (High V DDEXT )
put enable/disable). The measurement point V MEAS is 1.5 V for
V DDEXT (nominal) = 2.5 V/3.3 V.
80
V DDEXT = 2.75V
V DD EXT = 2.50V
INPUT
60
V DDEXT = 2.25V
OR
OUTPUT
V MEAS
V MEAS
40
20
0
–20
–40
–60
–80
V OH
V OL
Figure 37. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
Output Enable Time Measurement
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
–100
0
0.5
1.0
1.5
2.0
2.5
3.0
start driving.
SOURCE VOLTAGE (V)
Figure 35. Drive Current D (Low V DDEXT )
The output enable time t ENA is the interval from the point when a
reference signal reaches a high or low voltage level to the point
when the output starts driving as shown on the right side of
150
100
50
0
V DDEXT = 3.65V
V DDEXT = 3.30V
V DDEXT = 2.95V
V OH
The time t ENA _ MEASURED is the interval, from when the reference sig-
nal switches, to when the output voltage reaches V TRIP (high) or
V TRIP (low). V TRIP (high) is 2.0 V and V TRIP (low) is 1.0 V for V DDEXT
(nominal) = 2.5 V/3.3 V. Time t TRIP is the interval from when the
output starts driving to when the output reaches the V TRIP (high)
or V TRIP (low) trip voltage.
Time t ENA is calculated as shown in the equation:
t ENA = t ENA_MEASURED – t TRIP
–50
V OL
If multiple pins (such as the data bus) are enabled, the measure-
ment value is that of the first pin to start driving.
–100
Output Disable Time Measurement
–150
Output pins are considered to be disabled when they stop driv-
0
0.5
1.0 1.5 2.0
SOURCE VOLTAGE (V)
2.5
3.0
3.5
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The output disable time t DIS is the
difference between t DIS _ MEASURED and t DECAY as shown on the left side
Figure 36. Drive Current D (High V DDEXT )
t DIS = t DIS_MEASURED – t DECAY
Rev. E |
Page 42 of 64 |
September 2009
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| ADSP-BF561SBB600 | 制造商:Analog Devices 功能描述:IC MULTIPROCESSOR |
| ADSP-BF561SBB6ENG | 制造商:Analog Devices 功能描述:- Trays |
| ADSP-BF561SBBCZ-5A | 功能描述:IC DSP CTRLR 32B 500MHZ 256CPBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:40 系列:TMS320DM64x, DaVinci™ 类型:定点 接口:I²C，McASP，McBSP 时钟速率:400MHz 非易失内存:外部 芯片上RAM:160kB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:0°C ~ 90°C 安装类型:表面贴装 封装/外壳:548-BBGA，FCBGA 供应商设备封装:548-FCBGA（27x27） 包装:托盘 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-BF561SBBZ500 | 功能描述:IC PROCESSOR 500MHZ 297-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-BF561SBBZ600 | 功能描述:IC DSP 32BIT 600MHZ 297-BGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:40 系列:TMS320DM64x, DaVinci™ 类型:定点 接口:I²C，McASP，McBSP 时钟速率:400MHz 非易失内存:外部 芯片上RAM:160kB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:0°C ~ 90°C 安装类型:表面贴装 封装/外壳:548-BBGA，FCBGA 供应商设备封装:548-FCBGA（27x27） 包装:托盘 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
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