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| 型号： | ADT7490ARQZ |
| 厂商： | ON Semiconductor |
| 文件页数： | 42/75页 |
| 文件大小： | 0K |
| 描述： | IC MON/FAN CTRLR REMOTE 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 56 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 管件 |
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ADT7490
Bit 5 (MIN1) = 0, PWM1 is off (0% PWM duty cycle) when
the temperature is below T MIN ? T HYST .
Bit 5 (MIN1) = 1, PWM1 runs at PWM1 minimum duty
cycle below T MIN ? T HYST .
Configuration Register 6 (Register 0x10)
Bit 0 (SLOW) = 1, slows the ramp rate for PWM changes
associated with the Remote 1 temperature channel by 4.
Bit 1 (SLOW) = 1, slows the ramp rate for PWM changes
associated with the local temperature channel by 4.
Bit 2 (SLOW) = 1, slows the ramp rate for PWM changes
associated with the Remote 2 temperature channel by 4.
Bit 7 (ExtraSlow) = 1, slows the ramp rate for all fans by a
factor of 39.2%.
The following sections list the ramp-up times when the
SLOW bit is set for each temperature monitoring channel.
Enhanced Acoustics Register 1 (Register 0x62)
Bits [2:0] ACOU, selects the ramp rate for PWM outputs
associated with the Remote Temperature 1 input.
000 = 37.5 sec
001 = 18.8 sec
010 = 12.5 sec
011 = 7.5 sec
100 = 4.7 sec
101 = 3.1 sec
110 = 1.6 sec
111 = 0.8 sec
Enhanced Acoustics Register 2 (Register 0x63)
Bits [2:0] ACOU3, selects the ramp rate for PWM outputs
associated with the local temperature channel.
000 = 37.5 sec
001 = 18.8 sec
010 = 12.5 sec
011 = 7.5 sec
100 = 4.7 sec
101 = 3.1 sec
110 = 1.6 sec
111 = 0.8 sec
[6:4] ACOU2, selects the ramp rate for PWM outputs
When Bit 7 of Configuration Register 6 (0x10) = 1, the
preceding ramp rates change to
000 = 52.2 sec
001 = 26.1 sec
010 = 17.4 sec
011 = 10.4 sec
100 = 6.5 sec
101 = 4.4 sec
110 = 2.2 sec
111 = 1.1 sec
Setting the appropriate SLOW Bit 2, Bit 1, or Bit 0 of
Configuration Register 6 (0x10) slows the ramp rate further
by a factor of 4.
Programming the GPIOs
The ADT7490 has two dedicated GPIOs (Pin 5 and
Pin 6).The direction (input or output) and polarity (active
high or active low) of the GPIOs is set in the GPIO
Configuration Register (0x80). Bit 2 and Bit 3 of
Register 0x80 also reflect the state of the GPIO pins when
configured as inputs and assert the GPIO pins when
configured as outputs.
XNOR Tree Test Mode
The ADT7490 includes an XNOR tree test mode. This
mode is useful for in-circuit test equipment at board-level
testing. By applying stimulus to the pins included in the
XNOR tree, it is possible to detect opens, or shorts, on the
system board.
The XNOR tree test is invoked by setting Bit 0 (XEN) of
the XNOR Tree Test Enable register (Register 0x6F).
Figure 61 shows the signals that are exercised in the
XNOR tree test mode.
PWM2
PWM3
TACH1
TACH2
TACH3
associated with the Remote Temperature 2 input.
000 = 37.5 sec
TACH4
PWM1/XTO
001 = 18.8 sec
010 = 12.5 sec
011 = 7.5 sec
100 = 4.7 sec
101 = 3.1 sec
110 = 1.6 sec
111 = 0.8 sec
http://onsemi.com
42
Figure 61. XNOR Tree Test
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