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| 型号： | ADT7490ARQZ |
| 厂商： | ON Semiconductor |
| 文件页数： | 68/75页 |
| 文件大小： | 0K |
| 描述： | IC MON/FAN CTRLR REMOTE 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 56 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 管件 |
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ADT7490
Table 97. REGISTER 0x7D ? CONFIGURATION REGISTER 4 (POWER-ON DEFAULT = 0x00)
Bit No.
[1:0]
[2]
[3]
[4]
[5]
[6]
[7]
Mnemonic
Pin 14 Func
THERM
Disable
Max/Full on
THERM
BpAtt
+2.5 V IN
BpAtt V CCP
BpAtt
+5 V IN
BpAtt
+12 V IN
R/W (Note 1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits set the functionality of Pin 14.
00 = TACH4 (Default)
01 = THERM
10 = SMBALERT
11 = Reserved
THERM Disable = 0 enables THERM overtemperature output assuming THERM is correctly
configured (0x78, 0x7C, and 0x7D).
THERM Disable = 1 disables THERM overtemperature output on all channels. THERM can
also be disabled on any channel by:
Writing ? 64 ? C to the appropriate THERM temperature limit in Offset 64 mode.
Writing ? 128 ? C to the appropriate THERM temperature limit in twos complement mode.
Max/Full on THERM = 0 indicates that fans go to 100% when THERM temperature limit is
exceeded.
Max/Ful l on THERM = 1 indicates that fans go to maximum speed (0x38, 0x39, 0x3A) when
THERM temperature limit is exceeded.
Bypass +2.5V IN attenuator. When set, the measurement scale for this channel changes from
0 V (0x00) to 2.25 V (0xFF).
Bypass V CCP attenuator. When set, the measurement scale for this channel changes from
0 V (0x00) to 2.25 V (0xFF).
Bypass +5 V IN attenuator. When set, the measurement scale for this channel changes from
0 V (0x00) to 2.25 V (0xFF).
Bypass +12 V IN attenuator. When set, the measurement scale for this channel changes from
0 V (0x00) to 2.25 V (0xFF).
1. This register becomes read-only when the Configuration Register 1 (0x40) Lock bit is set to 1. Any further attempts to write to this register
have no effect.
Table 98. REGISTER 0x7E ? MANUFACTURER’S TEST REGISTER 1 (POWER-ON DEFAULT = 0x00)
Bit No.
[7:0]
Mnemonic
Reserved
R/W (Note 1)
Read-only
Description
Manufacturer’s test register. These bits are reserved for manufacturer ’s test purposes and
should not be written to under normal operation.
1. This register becomes read-only when the Configuration Register 1 (0x40) Lock bit is set to 1. Any further attempts to write to this register
have no effect.
Table 99. REGISTER 0x7F ? MANUFACTURER’S TEST REGISTER 2 (POWER-ON DEFAULT = 0x00)
Bit No.
[7:0]
Mnemonic
Reserved
R/W (Note 1)
Read-only
Description
Manufacturer’s test register. These bits are reserved for manufacturer ’s test purposes and
should not be written to under normal operation.
1. This register becomes read-only when the Configuration Register 1 (0x40) Lock bit is set to 1. Any further attempts to write to this register
have no effect.
Table 100. REGISTER 0x80 ? GPIO CONFIGURATION REGISTER (POWER-ON DEFAULT = 0x00)
Bit No.
[1:0]
[2]
[3]
[4]
[5]
[6]
[7]
Mnemonic
RES
GPIO2
GPIO1
GPIO2 POL
GPIO1 POL
GPIO2 DIR
GPIO1 DIR
R/W
Reserved
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
If GPIO2 is set to input, this register reflects the state of the pin. If GPIO2 is configured as an
output, writing to this register asserts the output high or low depending on the polarity.
If GPIO1 is set to input, this register reflects the state of the pin. If GPIO1 is configured as an
output, writing to this register asserts the output high or low depending on the polarity.
GPIO2 polarity bit. Set to 0 for active low. Set to 1 for active high.
GPIO1 polarity bit. Set to 0 for active low. Set to 1 for active high.
GPIO2 direction bit. Set to 1 for GPIO1 to act as an input, set to 0 for GPIO2 to act as an output.
GPIO1 direction bit. Set to 1 for GPIO1 to act as an input, set to 0 for GPIO1 to act as an output.
http://onsemi.com
68
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