参数资料
型号: ADT7490ARQZ
厂商: ON Semiconductor
文件页数: 60/75页
文件大小: 0K
描述: IC MON/FAN CTRLR REMOTE 24-QSOP
产品变化通告: MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
Product Discontinuation 30/Sept/2011
标准包装: 56
系列: dBCool®
功能: 风扇控制,温度监控器
传感器类型: 内部和外部
感应温度: -40°C ~ 125°C
精确度: ±1.5°C(最小值)
拓扑: ADC,比较器,风扇速度计数器,多路复用器,寄存器库
输出类型: SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 管件
ADT7490
Table 75. REGISTER 0x63 ? ENHANCED ACOUSTICS REGISTER 2 (POWER-ON DEFAULT = 0x00)
Bit No.
[2:0]
Mnemonic
ACOU2
R/W (Note 1)
R/W
Description
Assuming that PWMx is associated with the local temperature channel, these bits define the
maximum rate of change of the PWMx output for local temperature-related changes. Instead of
the fan speed jumping instantaneously to its newly determined speed, it ramps gracefully at the
rate determined by these bits. This feature ultimately enhances the acoustics of the fan.
When Bit 7 of Configuration Register 6 (0x10) is 0
Bit Code
000 = 1
001 = 2
010 = 3
011 = 4
100 = 8
101 = 12
110 = 24
111 = 48
Time for 0% to 100%
37.5 sec
18.8 sec
12.5 sec
7.5 sec
4.7 sec
3.1 sec
1.6 sec
0.8 sec
When Bit 7 of Configuration Register 6 (0x10) is 1
Bit Code
000 = 1
001 = 2
010 = 3
011 = 4
100 = 8
101 = 12
110 = 24
111 = 48
Time for 0% to 100%
52.2 sec
26.1 sec
17.4 sec
10.4 sec
6.5 sec
4.4 sec
2.2 sec
1.1 sec
[3]
[6:4]
[7]
EN2
ACOU3
EN3
R/W
R/W
R/W
When this bit is 1, smoothing is enabled on the local temperature channel.
Assuming that PWMx is associated with the Remote 2 temperature channel, these bits define
the maximum rate of change of the PWMx output for Remote 2 Temperature related
changes. Instead of the fan speed jumping instantaneously to its newly determined speed, it
ramps gracefully at the rate determined by these bits. This feature ultimately enhances the
acoustics of the fan.
When this bit is 1, smoothing is enabled on the Remote 2 temperature channel.
1. This register becomes read-only when the Configuration Register 1 (0x40) Lock bit is set to 1. Any further attempts to write to this register
have no effect.
Table 76. PWM MINIMUM DUTY CYCLE REGISTERS
Register Address
0x64
0x65
0x66
R/W (Note 1)
R/W
R/W
R/W
Description
PWM1 Minimum Duty Cycle
PWM2 Minimum Duty Cycle
PWM3 Minimum Duty Cycle
Power-On Default
0x80 (50% Duty Cycle)
0x80 (50% Duty Cycle)
0x80 (50% Duty Cycle)
1. These registers become read-only when the ADT7490 is in automatic fan control mode.
Table 77. REGISTER 0x64, REGISTER 0x65, AND REGISTER 0x66 ? PWM1, PWM2, AND PWM3 MIN DUTY CYCLES
(POWER-ON DEFAULT = 0x80)
Register Address
[7:0]
R/W (Note 1)
R/W
Description
These bits define the PWM MIN duty cycle for PWMx.
0x00 = 0% Duty Cycle (Fan Off)
0x40 = 25% Duty Cycle
0x80 = 50% Duty Cycle
0xFF = 100% Duty Cycle (Fan Full Speed)
1. This register becomes read-only when the Configuration Register 1 (0x40) Lock bit is set to 1. Any further attempts to write to this register
have no effect.
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