参数资料
型号: ADUC7121BBCZ
厂商: Analog Devices Inc
文件页数: 31/96页
文件大小: 0K
描述: IC ARM7TDMI MCU 126KB 108CSPBGA
标准包装: 1
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 41.78MHz
连通性: I²C,SPI,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 126KB(63K x 16)
程序存储器类型: 闪存
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 9x12b,D/A 4x12b
振荡器型: 内部
工作温度: -10°C ~ 95°C
封装/外壳: 108-LFBGA,CSPBGA
包装: 托盘
Data Sheet
ADuC7121
Rev. B | Page 37 of 96
Table 41. FEE0PRO and FEE0HID MMR Bit Designations
Bit
Description
31
Read protection.
Cleared by the user to protect Block 0.
Set by the user to allow reading Block 0.
30:0
Write protection for Page 123 to Page 120, for Page 119
to Page 116, and for Page 0 to Page 3.
Cleared by the user to protect the pages in writing.
Set by the user to allow writing the pages.
Command Sequence for Executing a Mass Erase
FEE0DAT = 0x3CFF;
FEE0ADR = 0xFFC3;
FEE0MOD = FEE0MOD|0x8;
//Erase key enable
FEE0CON = 0x06;
//Mass erase command
FEE1DAT Register
FEE1DAT is a 16-bit data register.
Name:
FEE1DAT
Address:
0xFFFF0E8C
Default value:
0xXXXX
Access:
Read and write
FEE1ADR Register
FEE1ADR is a 16-bit address register.
Name:
FEE1ADR
Address:
0xFFFF0E90
Default value:
0x0000
Access:
Read and write
FEE1SGN Register
FEE1SGN is a 24-bit code signature.
Name:
FEE1SGN
Address:
0xFFFF0E98
Default value:
0xFFFFFF
Access:
Read only
FEE1PRO Register
FEE1PRO provides protection following subsequent reset MMR.
It requires a software key (see Table 42).
Name:
FEE1PRO
Address:
0xFFFF0E9C
Default value:
0x00000000
Access:
Read and write
FEE1HID Register
FEE1HID provides immediate protection MMR. It does not
require any software keys (see Table 42).
Name:
FEEHID
Address:
0xFFFF0EA0
Default value:
0xFFFFFFFF
Access:
Read and write
Table 42. FEE1PRO and FEE1HID MMR Bit Designations
Bit
Description
31
Read protection.
Cleared by the user to protect Block 1.
Set by the user to allow reading Block 1.
30
Write protection for Page 127 to Page 120.
Cleared by the user to protect the pages in writing.
Set by the user to allow writing the pages.
29:0
Write protection for Page 119 to Page 116 and for Page 0
to Page 3.
Cleared by the user to protect the pages in writing.
Set by the user to allow writing the pages.
FEE0STA Register
Name:
FEE0STA
Address:
0xFFFF0E00
Default value:
0x0000
Access:
Read and write
FEE1STA Register
Name:
FEE1STA
Address:
0xFFFF0E80
Default value:
0x0000
Access:
Read and write
Table 43. FEExSTA MMR Bit Designations
Bit
Description
15:6
Reserved.
5
Reserved.
4
Reserved.
3
Flash/EE interrupt status bit.
Set automatically when an interrupt occurs, that is,
when a command is complete and the Flash/EE
interrupt enable bit in the FEExMOD register is set.
Cleared when reading FEExSTA register.
2
Flash/EE controller busy.
Set automatically when the controller is busy.
Cleared automatically when the controller is not busy.
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