参数资料
型号: ADUC834BCPZ
厂商: Analog Devices Inc
文件页数: 15/80页
文件大小: 0K
描述: IC MCU 62K FLASH ADC/DAC 56LFCSP
标准包装: 1
系列: MicroConverter® ADuC8xx
核心处理器: 8052
芯体尺寸: 8-位
速度: 12.58MHz
连通性: EBI/EMI,I²C,SPI,UART/USART
外围设备: POR,PSM,PWM,温度传感器,WDT
输入/输出数: 34
程序存储器容量: 62KB(62K x 8)
程序存储器类型: 闪存
EEPROM 大小: 4K x 8
RAM 容量: 2.25K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.25 V
数据转换器: A/D 3x16b,4x24b; D/A 1x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 56-VFQFN 裸露焊盘,CSP
包装: 托盘
REV. A
–22–
ADuC834
PRIMARY AND AUXILIARY ADC NOISE
PERFORMANCE
Tables X, XI, and XII show the output rms noise in V and
output peak-to-peak resolution in bits (rounded to the nearest
0.5 LSB) for some typical output update rates on both the primary
and auxiliary ADCs. The numbers are typical and are generated
at a differential input voltage of 0 V. The output update rate is
selected via the Sinc Filter (SF) SFR. It is important to note
that the peak-to-peak resolution figures represent the resolution
for which there will be no code flicker within a six-sigma limit.
The QuickStart Development system PC software comes
complete with an ADC noise evaluation tool. This tool can be
easily used with the evaluation board to see these figures from
silicon.
Table X. Primary ADC, Typical Output RMS Noise ( V)
Typical Output RMS Noise vs. Input Range and Update Rate; Output RMS Noise in
V
SF
Data Update
Input Range
Word
Rate (Hz)
20 mV
40 mV
80 mV
160 mV
320 mV
640 mV
1.28 V
2.56 V
13
105.3
1.50
1.60
1.75
3.50
4.50
6.70
11.75
69
19.79
0.60
0.65
0.95
1.40
2.30
255
5.35
0.35
0.37
0.51
0.82
1.25
Table XI. Primary ADC, Peak-to-Peak Resolution (Bits)
Peak-to-Peak Resolution vs. Input Range and Update Rate; Peak-to-Peak Resolution in Bits
SF
Data Update
Input Range
Word
Rate (Hz)
20 mV
40 mV
80 mV
160 mV
320 mV
640 mV
1.28 V
2.56 V
13
105.3
12
13
14
15
15.5
16
69
19.79
13.5
14
15
16
17
17.5
18
18.5
255
5.35
14
15
16
17
18
18.5
19
19.5
Typical RMS Resolution vs. Input Range and Update Rate: RMS Resolution in Bits
*
SF
Data Update
Input Range
Word
Rate (Hz)
20 mV
40 mV
80 mV
160 mV
320 mV
640 mV
1.28 V
2.56 V
13
105.3
14.7
15.7
16.7
17.7
18.2
18.7
69
19.79
16.2
16.7
17.7
18.7
19.7
20.2
20.7
21.2
255
5.35
16.7
17.7
18.7
19.7
20.7
21.2
21.7
22.2
*Based on a six-sigma limit, the rms resolution is 2.7 bits greater than the peak-to-peak resolution.
Table XII. Auxiliary ADC
Typical Output RMS Noise vs. Update Rate
*
Output RMS Noise in
V
SF
Data Update
Input Range
Word
R
ate (Hz)
2.5 V
13
105.3
10.75
69
19.79
2.00
255
5.35
1.15
*ADC converting in Bipolar mode
Peak-to-Peak Resolution vs. Update Rate
1
Peak-to-Peak Resolution in Bits
SF
Data Update
Input Range
Word
Rate (Hz)
2.5 V
13
105.3
16
2
69
19.79
16
255
5.35
16
NOTES
1ADC converting in Bipolar mode
2In Unipolar mode, peak-to-peak resolution at 105 Hz is 15 bits.
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