参数资料
型号: ADV3203ASWZ
厂商: Analog Devices Inc
文件页数: 1/20页
文件大小: 0K
描述: IC CROSSPOINT SWIT 32X16 176LQFP
标准包装: 1
功能: 交叉点开关
电路: 1 x 32:16
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 5V,±2.5V,±3.3V
电流 - 电源: 200mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 176-LQFP
供应商设备封装: 176-LQFP-EP(24x24)
包装: 托盘
300 MHz, 32 × 16 Buffered
Analog Crosspoint Switch
ADV3202/ADV3203
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2008 Analog Devices, Inc. All rights reserved.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
FEATURES
Large, 32 × 16, nonblocking switch array
G = +1 (ADV3202) or G = +2 (ADV3203) operation
32 × 32 pin-compatible version available (ADV3200/ADV3201)
Single +5 V, dual ±2.5 V, or dual ±3.3 V supply (G = +2)
Serial programming of switch array
2:1 OSD insertion mux per output
Input sync-tip clamp
High impedance output disable allows connection of
multiple devices with minimal output bus load
Excellent video performance
60 MHz 0.1 dB gain flatness
0.1% differential gain error (RL = 150 Ω)
0.1° differential phase error (RL = 150 Ω)
Excellent ac performance
Bandwidth: >300 MHz
Slew rate: >400 V/μs
Low power: 1 W
Low all hostile crosstalk: 48 dB @ 5 MHz
Reset pin allows disabling of all outputs
Connected through a capacitor to ground, provides
power-on reset capability
176-lead exposed pad LQFP package (24 mm × 24 mm)
APPLICATIONS
CCTV surveillance
Routing of high speed signals, including
Composite video (NTSC, PAL, S, SECAM)
RGB and component video routing
Compressed video (MPEG, wavelet)
Video conferencing
FUNCTIONAL BLOCK DIAGRAM
V
VNEG
DGND
DVCC
POS
DATA
OUT
ENABLE/
DISABLE
193-BIT SHIFT REGISTER
PARALLEL LATCH
16 × 5:32
DECODERS
ADV3202
(ADV3203)
OUTPUT
BUFFER
G = +1
(G = +2)
ENABLE/
BYPASS
16
97
96
512
SYNC-TIP
CLAMP
SWITCH
MATRIX
OSD
MUX
16
OUTPUTS
32
INPUTS
..
.
..
.
..
.
..
.
16
REFERENCE
CLK
DATA IN
VCLAMP
VREF
OSD
INPUTS
OSD
SWITCHES
07
52
6-
0
01
UPDATE
CS
RESET
96
Figure 1.
GENERAL DESCRIPTION
The ADV3202/ADV3203 are 32 × 16 analog crosspoint switch
matrices. They feature a selectable sync-tip clamp input for
ac-coupled applications and a 2:1 on-screen display (OSD)
insertion mux. With 48 dB of crosstalk and 80 dB isolation
at 5 MHz, the ADV3202/ADV3203 are useful in many high
density routing applications. The 0.1 dB flatness out to 60 MHz
makes the ADV3202/ADV3203 ideal for both composite and
component video switching.
The 16 independent output buffers of the ADV3202/ADV3203
can be placed into a high impedance state for paralleling cross-
point outputs so that off-channels present minimal loading to
an output bus if building a larger array. The ADV3202 has a
gain of +1 while the ADV3203 has a gain of +2 for ease of use in
back-terminated load applications. A single +5 V supply, dual
±2.5 V supplies, or dual ±3.3 V supplies (G = +2) can be used
while consuming only 195 mA of idle current with all outputs
enabled. The channel switching is performed via a double
buffered, serial digital control that can accommodate daisy
chaining of several devices.
The ADV3202/ADV3203 are packaged in a 176-lead exposed
pad LQFP package (24 mm× 24 mm) and are available over the
extended industrial temperature range of 40°C to +85°C.
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