参数资料
型号: ADV3225ACPZ
厂商: Analog Devices Inc
文件页数: 1/24页
文件大小: 0K
描述: IC CROSSPOINT SW 16X8 72LFCSP
标准包装: 1
功能: 交叉点开关
电路: 1 x 16:8
电压电源: 双电源
电压 - 电源,单路/双路(±): ±5V
电流 - 电源: 58mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 72-VFQFN 裸露焊盘,CSP
供应商设备封装: 72-LFCSP-VQ(10x10)
包装: 托盘
750 MHz, 16 × 8
Analog Crosspoint Switch
ADV3224/ADV3225
Rev. A
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responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
16 × 8 high speed, nonblocking switch array
Pinout and functionally equivalent to the AD8110/AD8111
Drop-in compatible with the ADV3228/ADV3229 8 × 8 array
Complete solution
Buffered inputs
Programmable high impedance outputs
8 output amplifiers, G = +1 (ADV3224), G = +2 (ADV3225)
Drives 150 Ω loads
Operates on ±5 V supplies
Low power: 0.5 W
Excellent ac performance
3 dB bandwidth
200 mV p-p: 1200 MHz (ADV3224), 900 MHz (ADV3225)
2 V p-p: 750 MHz (ADV3224), 850 MHz (ADV3225)
0.5 dB flatness (2 V p-p)
250 MHz (ADV3224), 235 MHz (ADV3225)
Slew rate: 2500 V/μs
Serial or parallel programming of switch array
72-lead LFCSP (10 mm × 10 mm)
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
FUNCTIONAL BLOCK DIAGRAM
ADV3224/
ADV3225
40
128
40-BIT SHIFT REGISTER
WITH 4-BIT
PARALLEL LOADING
PARALLEL LATCH
DECODE
8 × 5:16 DECODERS
8
CLK
DATAIN
UPDATE
CE
RESET
A0
DATAOUT
8
OU
TP
U
TS
16
INP
UT
S
A1
A2
SER/PAR
D0 D1 D2 D3 D4
SWITCH
E
NABL
E
/DI
S
ABL
E
MATRIX
SET INDIVIDUAL
OR RESET ALL
OUTPUTS TO OFF
OUTPUT
BUFFER
G = +1,
G = +2
09317-
001
Figure 1.
GENERAL DESCRIPTION
The ADV3224/ADV3225 are high speed 16 × 8 analog crosspoint
switch matrices. They offer a 3 dB signal bandwidth of greater
than 750 MHz and a high slew rate of greater than 2500 V/μs.
The ADV3224/ADV3225 include eight independent output
buffers that can be placed into a high impedance state for
paralleling crosspoint outputs to prevent off channels from
loading the output bus. The ADV3224 has a gain of +1 and the
ADV3225 has a gain of +2, and they both operate on voltage
supplies of ±5 V. Channel switching is performed via a serial
digital control that can accommodate the daisy chaining of
several devices or via a parallel control to allow updating of an
individual output without reprogramming the entire array.
The ADV3224/ADV3225 are available in the 72-lead LFCSP
package over the extended industrial temperature range of
40°C to +85°C.
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