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参数资料
| 型号： | AGL125-FFGG144 |
| 元件分类： | FPGA |
| 英文描述： | FPGA, 125000 GATES, PBGA144 |
| 封装： | 13 X 13 MM, 1 MM PITCH, FBGA-144 |
| 文件页数： | 12/12页 |
| 文件大小： | 234K |
| 代理商： | AGL125-FFGG144 |
IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
Pr od uct Br ief
9
VersaTiles
The IGLOO core consists of VersaTiles, which have been enhanced beyond the ProASICPLUS core tiles. The IGLOO
VersaTile supports the following:
All three-input logic functions—LUT-3 equivalent
Latch with clear or set
D-flip-flop with clear or set
Enable D-flip-flop with clear or set
Refer to Figure 4 for VersaTile configurations.
User Nonvolatile FlashROM
Actel IGLOO devices have 1 kbit of on-chip, user-
accessible, nonvolatile FlashROM. The FlashROM can be
used in diverse system applications:
Internet protocol addressing (wireless or fixed)
System calibration settings
Device serialization and/or inventory control
Subscription-based business models (for example,
set-top boxes)
Secure key storage for secure communications
algorithms
Asset management/tracking
Date stamping
Version management
The FlashROM is written using the standard IGLOO IEEE
1532 JTAG programming interface. The core can be
individually programmed (erased and written), and on-
chip AES decryption can be used selectively to securely
load data over public networks (except in the AGL030
device), such as security keys stored in the FlashROM for
a user design.
The FlashROM can be programmed via the JTAG
programming interface, and its contents can be read
back either through the JTAG programming interface or
via direct FPGA core addressing. Note that the FlashROM
can only be programmed from the JTAG interface, and
cannot be programmed from the internal logic array.
The FlashROM is programmed as 8 banks of 128 bits;
however, reading is performed on a byte-by-byte basis
using a synchronous interface. A 7-bit address from the
FPGA core defines which of the 8 banks and which of the
16 bytes within that bank are being read. The three most
significant
bits
(MSBs)
of
the
FlashROM
address
determine the bank, and the four least significant bits
(LSBs) of the FlashROM address define the byte.
The Actel IGLOO development software solutions,
Libero
Integrated
Design
Environment
(IDE)
and
Designer, have extensive support for the FlashROM
memory. One such feature is auto-generation of
sequential programming files for applications requiring
a unique serial number in each part. Another feature
allows the inclusion of static data for system version
control. Data for the FlashROM can be generated quickly
and easily using Actel Libero IDE and Designer software
tools. Comprehensive programming file support is also
included to allow for easy programming of large
numbers of parts with differing FlashROM contents.
SRAM and FIFO
IGLOO devices (except in the AGL030 device) have
embedded SRAM blocks along the north and south sides
of the device. Each variable-aspect-ratio SRAM block is
4,608 bits in size. Available memory configurations are
256x18, 512x9, 1kx4, 2kx2, and 4kx1 bits. The individual
blocks have independent read and write ports that can
be configured with different bit widths on each port. For
example, data can be sent through a 4-bit port and read
as a single bitstream. The embedded SRAM blocks can be
initialized via the device JTAG port (ROM emulation
mode) using the UJTAG macro (except in the AGL030
device).
Figure 4 VersaTile Configurations
X1
Y
X2
X3
LUT-3
Data
Y
CLK
Enable
CLR
D-FF
Data
Y
CLK
CLR
D-FF
LUT-3 Equivalent
D-Flip-Flop with Clear or Set
Enable D-Flip-Flop with Clear or Set
相关PDF资料 |
PDF描述 |
|---|---|
| AGL125-FG144I | FPGA, 125000 GATES, PBGA144 |
| AGL125-FG144 | FPGA, 125000 GATES, PBGA144 |
| AGL125-FGG144I | FPGA, 125000 GATES, PBGA144 |
| AGL125-FGG144 | FPGA, 125000 GATES, PBGA144 |
| AGL125-FQN132 | FPGA, 125000 GATES, QCC132 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AGL125V2-CS144 | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144ES | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144I | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144PP | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS196 | 功能描述:IC FPGA 1KB FLASH 125K 196-CSP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
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