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参数资料
| 型号： | AGL125-FFGG144 |
| 元件分类： | FPGA |
| 英文描述： | FPGA, 125000 GATES, PBGA144 |
| 封装： | 13 X 13 MM, 1 MM PITCH, FBGA-144 |
| 文件页数： | 8/12页 |
| 文件大小： | 234K |
| 代理商： | AGL125-FFGG144 |
IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
Pr od uct Br ief
5
Introduction and Overview
General Description
The IGLOO family of Flash FPGAs, based on a 130-nm
Flash process, offers the lowest power FPGA, a single-
chip
solution,
small
footprint
packages,
reprogrammability, and an abundance of advanced
features.
The Low Power Active capability (static idle) allows for
ultra-low power consumption (from 25 W) while the
IGLOO device is completely functional in the system by
maintaining I/O, SRAM, registers, and logic functions.
This allows the IGLOO device to control the system
power management based on external inputs (e.g.,
scanning
for
keyboard
stimulus)
while
consuming
minimal power.
The Flash*Freeze technology used in IGLOO devices
allows entering and exiting an ultra-low power mode
that consumes as little as 5 W while retaining SRAM
and register data. Flash*Freeze technology simplifies
power management through I/O and clock management
with rapid recovery to operation mode.
Nonvolatile Flash technology gives IGLOO devices the
advantage of being a secure, low power, single-chip
solution that is live at power-up (LAPU). IGLOO is
reprogrammable and offers time to market benefits at
an ASIC-level unit cost.
These features enable designers to create high-density
systems using existing ASIC or FPGA design flows and
tools.
IGLOO devices offer 1 kbit of on-chip, reprogrammable,
nonvolatile FlashROM memory storage as well as clock
conditioning circuitry based on an integrated phase-
locked loop (PLL). The AGL030 device has no PLL or RAM
support. IGLOO devices have up to 1 million system
gates, supported with up to 144 kbits of true dual-port
SRAM, and up to 288 user I/Os.
Flash*Freeze Technology
The IGLOO device offers unique Flash*Freeze technology
that allows the IGLOO device to enter and exit an ultra-
low power mode. IGLOO devices do not need additional
components to turn off I/Os or clocks while retaining the
design information, SRAM content, and registers. The
Flash*Freeze technology is combined with in-system
programmability, which allows users to quickly and easily
upgrade and update the design in the final stages of
manufacturing or in the field. The ability of IGLOO to
support 1.2 V core voltage allows further reduction of
power consumption, thus achieving the lowest total
system power.
Flash*Freeze technology allows the user to keep all power
supplies, I/Os, and clocks connected to the device in normal
operation. When the IGLOO device enters Flash*Freeze
mode, the device automatically shuts off the clocks and
inputs to the FPGA core; when the device exits Flash*Freeze
mode, all activity resumes and data is retained.
This
low
power
feature,
combined
with
reprogrammability, a single-chip and single-voltage
solution,
and
availability
of
small-footprint,
high
pin-count packages, makes IGLOO devices the best fit for
portable electronics.
Flash Advantages
Low Power
Flash-based IGLOO devices exhibit power characteristics
similar to those of an ASIC, making them an ideal choice
for power-sensitive applications. IGLOO devices have
only a very limited power-on current surge and no high-
current transition period, both of which occur on many
FPGAs.
IGLOO
devices
also
have
low
dynamic
power
consumption to further maximize power savings, which
is also reduced by the use of 1.2 V core voltage.
Low dynamic power consumption, combined with low
static power consumption and Flash*Freeze technology,
makes the IGLOO device the lowest total system power
offered by any FPGA.
Security
The nonvolatile, Flash-based IGLOO devices do not
require a boot PROM, so there is no vulnerable external
bitstream that can be easily copied. IGLOO devices
incorporate
FlashLock,
which
provides
a
unique
combination of reprogrammability and design security
without external overhead, advantages that only an
FPGA with nonvolatile Flash programming can offer.
IGLOO devices utilize a 128-bit Flash-based lock and a
separate AES key to secure programmed intellectual
property and configuration data. In addition, all
FlashROM data in the IGLOO devices can be encrypted
prior to loading, using the industry-leading AES-128
(FIPS192) bit block cipher encryption standard. The AES
standard was adopted by the National Institute of
Standards and Technology (NIST) in 2000, and replaces
the 1977 DES standard. IGLOO devices have a built-in AES
相关PDF资料 |
PDF描述 |
|---|---|
| AGL125-FG144I | FPGA, 125000 GATES, PBGA144 |
| AGL125-FG144 | FPGA, 125000 GATES, PBGA144 |
| AGL125-FGG144I | FPGA, 125000 GATES, PBGA144 |
| AGL125-FGG144 | FPGA, 125000 GATES, PBGA144 |
| AGL125-FQN132 | FPGA, 125000 GATES, QCC132 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AGL125V2-CS144 | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144ES | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144I | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144PP | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS196 | 功能描述:IC FPGA 1KB FLASH 125K 196-CSP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
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