参数资料
型号: AGLE600V2-FFGG256C
元件分类: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA256
封装: 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-256
文件页数: 104/156页
文件大小: 5023K
代理商: AGLE600V2-FFGG256C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-37
1.2 V DC Core Voltage
Table 2-49 1.8 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed
Grade tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
1.55
8.20
0.26 1.53 1.95
1.10
8.35
6.89
2.86 1.68 14.16 12.69
ns
4 mA
Std.
1.55
6.82
0.26 1.53 1.95
1.10
6.95
5.88
3.25 3.16 12.75 11.69
ns
6 mA
Std.
1.55
5.84
0.26 1.53 1.95
1.10
5.95
5.20
3.51 3.71 11.75 11.00
ns
8 mA
Std.
1.55
5.51
0.26 1.53 1.95
1.10
5.61
5.06
3.58 3.87 11.42 10.87
ns
12 mA
Std.
1.55
5.41
0.26 1.53 1.95
1.10
5.51
5.07
3.66 4.42 11.32 10.88
ns
16 mA
Std.
1.55
5.41
0.26 1.53 1.95
1.10
5.51
5.07
3.66 4.42 11.32 10.88
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating
values.
Table 2-50 1.8 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed
Grade tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
2 mA
Std.
1.55
3.91
0.26 1.53 1.95
1.10
3.98
3.88
2.85 1.70
9.79
9.68
ns
4 mA
Std.
1.55
3.24
0.26 1.53 1.95
1.10
3.30
3.01
3.24 3.25
9.11
8.82
ns
6 mA
Std.
1.55
2.83
0.26 1.53 1.95
1.10
2.88
2.58
3.51 3.80
8.69
8.39
ns
8 mA
Std.
1.55
2.75
0.26 1.53 1.95
1.10
2.80
2.51
3.57 3.95
8.61
8.31
ns
12 mA
Std.
1.55
2.74
0.26 1.53 1.95
1.10
2.79
2.41
3.66 4.54
8.60
8.21
ns
16 mA
Std.
1.55
2.74
0.26 1.53 1.95
1.10
2.79
2.41
3.66 4.54
8.60
8.21
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating
values.
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