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参数资料
型号： AGLE600V2-FFGG256C
元件分类： FPGA
英文描述： FPGA, 13824 CLBS, 600000 GATES, PBGA256
封装： 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-256
文件页数： 67/156页
文件大小： 5023K
代理商： AGLE600V2-FFGG256C
IGLOOe DC and Switching Characteristics
2- 4
A d vance v0.3
PLL Behavior at Brownout Condition
Actel recommends using monotonic power supplies or voltage regulators to ensure proper
powerup behavior. Power ramp-up should be monotonic at least until VCC and VCCPLX exceed
brownout activation levels. The VCC activation level is specified as 1.1 V worst-case (see Figure 2-1
and Figure 2-2 on page 2-5 for more details).
When PLL power supply voltage and/or VCC levels drop below the VCC brownout levels (0.75 V ±
0.25 V), the PLL output lock signal goes low and/or the output clock is lost. Refer to the
Power-Up/-Down Behavior of Low-Power Flash Devices chapter of the handbook for information
on clock and lock recovery.
Internal Power-Up Activation Sequence
1. Core
2. Input buffers
Output buffers, after 200 ns delay from input buffer activation.
Figure 2-1 V5 – I/O State as a Function of VCCI and VCC Voltage Levels
Region 1: I/O buffers are OFF
Region 2: I/O buffers are ON.
I/Os are functional (except differential inputs)
but slower because V
CCI
/V
CC
are below
specification. For the same reason, input
buffers do not meet V
IH
/V
IL
levels, and
output buffers do not meet V
OH
/V
OL
levels.
Min V
CCI datasheet specification
voltage at a selected I/O
standard; i.e., 1.425 V or 1.7 V
or 2.3 V or 3.0 V
VCC
VCC = 1.425 V
Region 1: I/O Buffers are OFF
Activation trip point:
Va = 0.85 V ± 0.25 V
Deactivation trip point:
Vd = 0.75 V ± 0.25 V
Activation trip point:
Va = 0.9 V ± 0.3 V
Deactivation trip point:
Vd = 0.8 V ± 0.3 V
VCC = 1.575 V
Region 5: I/O buffers are ON
and power supplies are within
specification.
I/Os meet the entire datasheet
and timer specifications for
speed, V
IH
/V
IL
, V
OH
/V
OL
, etc.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential
but slower because V
CCI is
below specification. For the
same reason, input buffers do not
meet V
IH
/V
IL
levels, and output
buffers do not meet V
OH
/V
OL
levels.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential inputs)
where VT can be from 0.58 V to 0.9 V (typically 0.75 V)
VCCI
Region 3: I/O buffers are ON.
I/Os are functional; I/O DC
specifications are met,
but I/Os are slower because
the V
CC
is below specification.
V
CC = VCCI + VT
相关PDF资料
PDF描述
AGLE600V2-FFGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FFG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
相关代理商/技术参数
参数描述
AGLE600V2-FFGG896 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896I 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896PP 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FG256 功能描述:IC FPGA 1KB FLASH 600K 256-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOOe 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27）
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