参数资料
型号: AGLP125V2CSG289I
元件分类: FPGA
英文描述: FPGA, 3120 CLBS, 125000 GATES, PBGA289
封装: 14 X 14 MM, 1.2 MM HEIGHT, 0.8 MM PITCH, ROHS COMPLIANT, CSP-289
文件页数: 40/128页
文件大小: 4383K
代理商: AGLP125V2CSG289I
IGLOO PLUS Low Power Flash FPGAs
Re vi s i on 11
2-5
Figure 2-2
V2 Devices – I/O State as a Function of VCCI and VCC Voltage Levels
Region 1: I/O buffers are OFF
Region 2: I/O buffers are ON.
I/Os are functional (except differential inputs)
but slower because VCCI/VCC are below
specification. For the same reason, input
buffers do not meet VIH/VIL levels, and
output buffers do not meet VOH/VOL levels.
Min VCCI datasheet specification
voltage at a selected I/O
standard; i.e., 1.14 V,1.425 V, 1.7 V,
2.3 V, or 3.0 V
VCC
VCC = 1.14 V
Region 1: I/O Buffers are OFF
Activation trip point:
Va = 0.85 V ± 0.2 V
Deactivation trip point:
Vd = 0.75 V ± 0.2 V
Activation trip point:
Va = 0.9 V ± 0.15 V
Deactivation trip point:
Vd = 0.8 V ± 0.15 V
VCC = 1.575 V
Region 5: I/O buffers are ON
and power supplies are within
specification.
I/Os meet the entire datasheet
and timer specifications for
speed, VIH / VIL , VOH / VOL , etc.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential
but slower because VCCI is
below specification. For the
same reason, input buffers do not
meet VIH / VIL levels, and output
buffers do not meet VOH / VOL levels.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential inputs)
where VT can be from 0.58 V to 0.9 V (typically 0.75 V)
VCCI
Region 3: I/O buffers are ON.
I/Os are functional; I/O DC
specifications are met,
but I/Os are slower because
the VCC is below specification.
VCC = VCCI + VT
相关PDF资料
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AGLP125V2CSG289 FPGA, 3120 CLBS, 125000 GATES, PBGA289
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AGLP125V5-CS289I FPGA, 3120 CLBS, 125000 GATES, PBGA289
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相关代理商/技术参数
参数描述
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