参数资料
型号: AGLP125V2CSG289I
元件分类: FPGA
英文描述: FPGA, 3120 CLBS, 125000 GATES, PBGA289
封装: 14 X 14 MM, 1.2 MM HEIGHT, 0.8 MM PITCH, ROHS COMPLIANT, CSP-289
文件页数: 78/128页
文件大小: 4383K
代理商: AGLP125V2CSG289I
IGLOO PLUS Low Power Flash FPGAs
Re vi s i on 11
2 - 39
1.2 V LVCMOS Wide Range
Table 2-68 Minimum and Maximum DC Input and Output Levels
1.2 V
LVCMOS Wide
Range1
VIL
VIH
VOL
VOH
IOL IOH IOSL IOSH IIL
3 I
IH
4
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option2
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA5
Max
mA5 A6 A6
100 A
2mA
–0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.25 * VCCI 0.75 * VCCI 2
2
20
26
10
Notes:
1. Applicable to V2 devices only.
2. The minimum drive strength for any LVCMOS 1.2 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
3. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
4. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
5. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
6. Currents are measured at 85°C junction temperature.
7. Software default selection highlighted in gray.
Table 2-69 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
CLOAD (pF)
01.2
0.6
5
* Measuring point = Vtrip. See Table 2-23 on page 2-21 for a complete table of trip points.
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