
8
Biasing and Operation
AMMC-5024isbiasedwithasinglepositivedrainsupply
(Vdd)anegativegatesupply(Vg1).Forbestoverallperfor-
mancetherecommendedbiasisVdd =7VandIdd=200
mA.Toachievethisdraincurrentlevel,Vg1istypically
between–2.5to–3.5V.Typically,DCcurrentflowforVg1
is–10mA.
TheAMMC-5024hasasecondgatebias(Vg2)thatmaybe
usedforgaincontrol.Whennotbeingutilized,Vg2should
beleftopen-circuited.
Thisfeaturefurtherenhancestheversatilityofapplica-
tions where variable gain over a broad bandwidth is
necessary.
Thissecondgatebias(Vg2)isconnectedtothegatesof
theupperFETsineachcascodestagethroughasmall
de-queingresistor.Theotherendofthegatelineistermi-
natedinanon-chipresistive/diodedividernetwork,which
allowsthesecondgatetoself-bias.Thus,withVg2left
open-circuited,thedraincurrentissetbythe(Vg1)gate
biasvoltageappliedtothelowerFETineachstage.
ThenominalopencircuitvoltageforVg2isapproximately
2volts.Underthisoperatingcondition,maximumgain
andpowerareachievedfromtheTWA.
Byapplyinganexternalvoltagetothesecondgatebias
(Vg2)lessthantheopen-circuitpotential,thedrainvolt-
ageonthelowerFETcanbedecreasedtoapointwhere
thelowerFETentersthelinearoperatingregion.This
reducesthecurrentdrawnbyeachstage.DecreasingVg2
furtherwillreducethedrainvoltageonthelowerFETto-
wardszerowhilepinchingofftheupperFETineachstage.
AtlargernegativevaluesofVg2(between0and-2.5volts)
thegainoftheTWAwilldecreasesignificantly.
Usingthesimplestformofassembly(Figure20),thedevice
iscapableofdeliveringflatgainovera2–50GHzrange
withaminimumofgainslopeandripple.However,this
deviceisdesignedwithDCcoupledRFI/Oports,and
operationmaybeextendedtolowerfrequencies(<2
GHz)throughtheuseofoff-chiplow-frequencyextension
circuitryandproperexternalbiasingcomponents.With
lowfrequencybiasextensionitmaybeusedinavariety
oftime-domainapplications(through40Gb/s).
Figure21showsatypicalassemblyconfiguration.
WhenbypasscapacitorsareconnectedtotheAUXpads,
thelowfrequencylimitisextendeddowntothecorner
frequencydeterminedbythebypasscapacitorandthe
combinationoftheon-chip50ohmloadandsmallde-
queingresistor.Atthisfrequencythesmallsignalgain
willincreaseinmagnitudeandstayatthiselevatedlevel
downtothepointwheretheCauxbypasscapacitoractsas
anopencircuit,effectivelyrollingoffthegaincompletely.
Thelowfrequencylimitcanbeapproximatedfromthe
followingequation:
fCaux =
1
2
πCaux(Ro + RDEQ)
where:
Roisthe50gateordrainlineterminationresistor.
RDEQisthesmallseriesde-queingresistorand10.
Cauxisthecapacitanceofthebypasscapacitorcon-
nectedtotheAUXDrainpadinfarads.
WiththeexternalbypasscapacitorsconnectedtotheAUX
gateandAUXdrainpads,gainwillshowaslightincrease
between1.0and1.5GHz.Thisisduetoaseriescombina-
tionofCauxandtheonchipresistancebutisexaggerated
bytheparasiticinductance(Lc)ofthebypasscapacitorand
theinductanceofthebondwire(Ld).Thereforethebond
wirefromtheAuxpadstothebypasscapacitorsshould
bemadeasshortaspossible.
InputandoutputRFportsareDCcoupled;therefore,DC
decouplingcapacitorsarerequiredifthereareDCpaths.
(Donotattempttoapplybiastothesepads.)
RFbondconnectionsshouldbekeptasshortaspossible
toreduceRFleadinductancewhichwilldegradeperfor-
manceabove20GHz.
Anoptionaloutputpowerdetectornetworkisalsopro-
vided.A>0.5FcapacitorisrequiredfortheDet_Out
padtoexpandpowerdetectionperformancebelow100
MHz.
Groundconnectionsaremadewithplatedthrough-holes
tothebacksideofthedevice;therefore,groundwiresare
notneeded.