AN53
APPLICATION NOTE
16
Example of a PC Motherboard Layout and
Gerber File.
This section shows a reference design for motherboard
implementation of the RC5051 along with the Layout Gerber
File and Silk Screen. The actual PCAD Gerber File can be
obtained from Fairchild Semiconductor local Sales Office .
Guidelines for Debugging and
Performance Evaluations
Debugging Your First Design Implementation
1.
Note the setting of the VID pins to know what voltage is
to be expected.
2.
Do not connect any load to the circuit. While monitoring
the output voltage, apply power to the circuit with cur-
rent limiting at the power source. This ensures that no
catastrophic shorts are present.
3.
If proper voltage is not achieved go to “Procedures”
below.
4.
When you have proper voltage, increase the current
limiting of the power source to 16A.
5.
Apply load in 1A increments. An active load (HP6060B
or equivalent) is suggested.
6.
In case of poor regulation refer to “Procedures” below.
Procedures
1.
If there is no voltage at the output and the circuit is not
drawing current look for opens in the connections,
check the circuitry versus schematic, and check the
power supply pins of the RC5051 to make sure that volt-
age(s) are applied.
2.
If there is no voltage at the output and the circuit is
drawing excessive current (>100mA) with no load,
check for possible shorts. Determine the path of the
excessive current and which device is drawing it–this
current may be drawn by peripheral components.
3.
If the output voltage comes close to the expected value,
check the VID inputs at the device pins. The part is fac-
tory set to respond properly to the VID inputs.
4.
Shut down at too low a current can be caused by an
inappropriate value of the sense resistor. See the “Sense
Resistor” section.
5.
Poor load regulation can be due to many causes. Check
the voltages and signals at the critical pins.
6.
The VREF pin should be at the voltage set by the VID
pins. If the power supply pins and the VID pins are cor-
rect the VREF should have the correct voltage.
7.
Next check the oscillator pin. You should see a saw tooth
wave at the frequency set by the external capacitor.
8.
When the VREF and CEXT pins are checked and
correct and the output voltage is incorrect, look at the
waveform at VCCQP. This pin should be +12V (in the
+12V application), and should be swinging from
slightly below +5V to about +10V (in the charge pump
application). If the VCCQP pin is noisy, with ripples/
over-shoots riding on it this may make the converter
function incorrectly.
9.
Next, look at HIDRV pin. This pin directly drives the
gate of the high-side FET. It should provide a gate drive
(measured gate to ground) of about 10V when turning
the FET on. A careful study of the layout is recom-
mended. Refer to the “PCB Layout Guidelines” section.
10. Past experience shows that the most frequent errors are
incorrect components, improper connections, and poor
layout.
Performance Evaluation
This section shows sample evaluation results as a reference
guide for evaluating a DC-DC Converter using the RC5051
on a Pentium II motherboard.
DC Regulation
VID
(2.0V)
43210
2.0V 00001
I
load
(A)
0.5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14.5
V
out
(V)
2.019
2.018
2.017
2.016
2.014
2.013
2.012
2.010
2.009
2.007
2.006
2.005
2.004
2.003
2.001
2.001
0.90%
Load Regulation 0.5-14.5A