参数资料
型号: AP6502SP-13
厂商: Diodes Inc
文件页数: 9/15页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 8SO
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.925 V ~ 16 V
输入电压: 4.75 V ~ 18 V
PWM 型: 电流模式
频率 - 开关: 340kHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm Width)裸露焊盘
包装: 标准包装
供应商设备封装: 8-SO 裸露焊盘
其它名称: AP6502SP-13DIDKR
R 1 = R 2 ? ? ? OUT ? 1 ? ?
AP6502
Applications Information (cont.)
Under Voltage Lockout (UVLO)
Under Voltage Lockout is implemented to prevent the IC from insufficient input voltages. The AP6502 has a UVLO comparator that monitors
the input voltage and the internal bandgap reference. If the input voltage falls below 4.0V, the AP6502 will latch an under voltage fault. In this
event the output will be pulled low and power has to be re-cycled to reset the UVLO fault.
Over Voltage Protection
When the AP6502 FB pin exceeds 20% of the nominal regulation voltage of 0.925V, the over voltage comparator is tripped and the COMP
pin and the SS pin are discharged to GND, forcing the high-side switch off.
Thermal Shutdown
The AP6502 has on-chip thermal protection that prevents damage to the IC when the die temperature exceeds safe margins. It implements a
thermal sensing to monitor the operating junction temperature of the IC. Once the die temperature rises to approximately +160°C, the thermal
protection feature gets activated. The internal thermal sense circuitry turns the IC off thus preventing the power switch from damage.
A hysteresis in the thermal sense circuit allows the device to cool down to approximately +120°C before the IC is enabled again through soft
start. This thermal hysteresis feature prevents undesirable oscillations of the thermal protection circuit.
Setting the Output Voltage
The output voltage can be adjusted from 0.925V to 16V using an external resistor divider. Table 1 shows a list of resistor selection for
common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high
values of R1 there is less current consumption in the feedback network. However the trade off is output voltage accuracy due to the bias
current in the error amplifier. R1 can be determined by the following equation:
? V ?
? 0.925 ?
Figure 4 Feedback Divider Network
When output voltage is low, network as shown in Figure 4 is recommended.
Table 1 – Resistor Selection for Common Output Voltages
V OUT (V)
R1 (k ? ) R2 (k ? )
5 45.3 10
3.3 26.1 10
2.5 16.9 10
1.8 9.53 10
1.2 3 10
Compensation Components
The AP6502 has an external COMP pin through which system stability and transient response can be controlled. COMP pin is the output of
the internal trans-conductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the
characteristics of the control system. The DC gain of the voltage feedback loop is given by:
A VDC = R LOAD × G CS × A VEA ×
V FB
V OUT
Where V FB is the feedback voltage (0.925V), R LOAD is the load resistor value, G CS is the current sense trans-conductance and A VEA is the
error amplifier voltage gain.
AP6502
Document Number: DS35423 Rev. 9 - 2
9 of 15
www.diodes.com
January 2013
? Diodes Incorporated
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