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参数资料
| 型号： | AS1339 EB |
| 厂商： | ams |
| 文件页数： | 17/26页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL AS1339 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，LDO 步降 |
| 输出及类型： | 3，非隔离 |
| 输出电压： | 0.8 ~ 3.75 V，2.85V，2.85V |
| 电流 - 输出： | 650mA |
| 输入电压： | 2.7 ~ 5.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | AS1339 |
AS1339
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1339 is designed to dynamically power the PA in WCDMA and NCDMA handsets. The device is empowered
with a high-frequency, high-efficiency step-down converter, and two LDOs. The step-down converters are capable of
delivering 650mA. The PWM control scheme provides fast transient response, while 2MHz switching frequency allows
the trade-off between efficiency and small external components. A 110m Ω bypass FET connects the PA directly to the
battery during high-power transmission.
Figure 49. AS1339 - Block Diagram
Li+ Battery
+
IN1A
Bypass FET
IN1B
2MHz BUCK
PFET
LX
PAB
PAA
2.2μH
2.5x REFIN
4.7μF
DAC
BASEBAND
REFIN
NFET
PGND
LDO1
2.85V
PROCESSOR
GPIO
GPIO
GPIO
PA_EN
EN1
EN2
TEST
Not
Connected
Control
Logic
LDO1
LDO2
ROFF
ROFF
LDO2
0.1μF
0.1μF
2.85V
1μF
IN2
REF
AS1339
NC
AGND
Operating the AS1339
The AS1339’s control block turns on the internal PFET (P-channel MOSFET) switch during the first part of each
switching cycle, thus allowing current to flow from the input through the inductor to the output filter capacitor and load.
The inductor limits the current to a ramp with a slope of (V IN - V OUT ) / L, by storing energy in a magnetic field.
During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and
then turns the NFET (N-channel MOSFET) synchronous rectifier on. As a result, the inductor ’s magnetic field
collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter
capacitor and load.
While the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope
of V OUT / L. The output filter capacitor stores charge when the inductor current is high, and releases it when low,
smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on-time to
control the average current sent to the load.
The output voltage is equal to the average voltage at the LX pin.
While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the
energy per cycle to control the power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse
width to control the peak inductor current. This is done by comparing the signal from the current-sense amplifier with a
slope compensated error signal from the voltage-feedback error amplifier. At the beginning of each cycle, the clock
turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error
amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending
the first part of the cycle.
If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to
ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and
Revision 1.05
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