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参数资料
| 型号： | AS1339 EB |
| 厂商： | ams |
| 文件页数： | 4/26页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL AS1339 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，LDO 步降 |
| 输出及类型： | 3，非隔离 |
| 输出电压： | 0.8 ~ 3.75 V，2.85V，2.85V |
| 电流 - 输出： | 650mA |
| 输入电压： | 2.7 ~ 5.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | AS1339 |
AS1339
Datasheet - P i n o u t
Table 1. Pin Description
Pin Name
IN2
TEST
IN1B, IN1A
LDO1
EN1
PAB, PAA
Pin Number
C1
C2
C3, C4
D1
D2
D3, D4
Description
Supply Voltage Input for LDO1 and LDO2. Connect IN2 to a battery or
supply voltage from 2.7V to 5.5V. Decouple IN2 with a 1 μ F ceramic
capacitor as close as possible to IN2 and AGND. Connect IN2 to the same
source as IN1A and IN1B.
NC. Used for internal test purpose. The pin is internally pulled down with a
110k Ω resistor.
Supply Voltage Input for PA Step-Down Converter. Connect IN1A/B to a
battery or supply voltage from 2.7V to 5.5V. Decouple IN1A/B with a 10 μ F
ceramic capacitor as close as possible to IN1A/B, and PGND. IN1A and
IN1B are internally connected together. Connect IN1A/B to the same source
as IN2.
10mA LDO Regulator 1 Output. Decouple LDO1 with a 0.1 μ F ceramic
capacitor as close as possible to LDO1 and AGND. LDO1 is internally pulled
down through a 100 Ω resistor when this regulator is disabled.
Enable Input for LDO1. For normal operation, connect to logic-high. For
shutdown mode, connect to logic-low. The pin is internally pulled down
through a 110k Ω resistor.
PA Connection for Bypass Mode. Internally connected to IN1A/B using
the internal bypass MOSFET during bypass mode. Connect PAA/B with a
4.7 μ F ceramic capacitor as close as possible to PAA/B and PGND.
Revision 1.05
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