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参数资料
| 型号： | AS8501-ASOU |
| 厂商： | ams |
| 文件页数： | 40/41页 |
| 文件大小： | 0K |
| 描述： | IC DATA ACQ 16-SOIC |
| 特色产品： | AS8501 High Precision Data Acquisition Ics |
| 标准包装： | 46 |
| 类型： | 数据采集系统（DAS） |
| 输入类型： | 模拟，数字 |
| 输出类型： | 模拟，数字 |
| 接口： | 串行 |
| 电流 - 电源： | 5mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
| 产品目录页面： | 803 (CN2011-ZH PDF) |
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AS8501 - Data Sheet
austriamicrosystems
Revision 1.1, 04-April-06
www.austriamicrosystems.com
Page 7 of 40
Electrical characteristics (continued)
VDDA=5V +/-0.1 V, fclk=8.192 MHz, chopping ratio MM=4 (see 7.5.3), oversampling frequency=2.048 MHz, oversampling ratio=128
temperature range : -40 to 125°C if not otherwise noted
symbol
parameter
conditions
min
typ
max
units
data conversion
RES
resolution
all channels
16
bits
1) 2)
Vref
reference voltage
room temperature
1.13
1.21
1.30
V
3)
Vref_TC
temperature coefficient of Vref
-50
50
ppm/K
4)
Vref_Ri
internal resistance of Vref
Rload > 50 kOhm
200
Ohm
fovs
clock frequency
4.096
MHz
R1
oversamplig ratio
64
128
MM
conversions during chopper cycle
4
8
BW
bandwidth
7.8
1000
16000
Hz
av
internal averaging
1
4
1024
cycles
fclk
external clock frequency
0.05
8.192
10
MHz
5)
CLK_extdiv
clock division factor
2
4
DR_clk
duty ratio of external clock
50
%
int_fclk
internal clock frequency
180
250
330
kHz
analog inputs
RSHH, VBAT, ETS, ETS
Rin
input resistance
Ue < 150 mV
50
100
MOhm
Cin
input capacitance at gain 24
8
15
30
pF
internal temperature sensor
T_out20
output at 23°C
G 6, typical
22500
23 000
23500
digits
6)
T_sl
slope
-20 to 100°C
73
75
77
digits/degC
7)
Terr85
error of temperature measurement 0 to 85°C
0.5
2
degC
7)
Terr125
-40 to 125°C
1
3
degC
7)
current source
output to RSHH, RSHL
Icurr_rshh
1.5
2
3
A
Notes:
1)
with external averaging the resolution can be increased up to 21 bits with an effective sampling rate below 10 Hz
2
) the system works in overflow condition without degradation of accuracy up to 1.4 * range width.
This means that the overflow bit can work as bit no.17 in this range.
3)
the absolute value will be trimmed digitally to (1.28*/-0.01) V at 23°C, if not otherwise specified
4)
the TC-value will be trimmed digitally to end up with a typical TC-value of the output ( total measurement path) at G24 better than 20 ppm/K the
TC- value of the
reference voltage after trimming may be typically as high as 50 ppm/K due to manufacturing spread. Min,max limits are not tested but derived
from device
characterization
5)
in the temperature range 0 - 85°C the clock frequency can be increased to 12 MHz
6)
value trimmed to +/- 30 digits during final test and stored into ZZR
7)
The slope of the sensor is measured on sample basis per lot and not tested per device. The specified limits are derived from device
characterization.
ams
AG
Technical
content
still
valid
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