参数资料
型号: AT24C512W-10SU-1.8
厂商: Atmel
文件页数: 3/22页
文件大小: 0K
描述: IC EEPROM 512KBIT 400KHZ 8SOIC
标准包装: 94
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 512K (64K x 8)
速度: 100kHz,400kHz
接口: I²C,2 线串口
电源电压: 1.8 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
AT24C512
Pin Description
Memory Organization
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that are
hardwired or left not connected for hardware compatibility with other AT24Cxx devices.
When the pins are hardwired, as many as four 512K devices may be addressed on a
single bus system (device addressing is discussed in detail under the Device Address-
ing section . If the pins are left floating, the A1 and A0 pins will be internally pulled down
to GND if the capacitive coupling to the circuit board V CC plane is <3 pF. If coupling is
>3 pF, Atmel recommends connecting the address pins to GND.
WRITE PROTECT (WP): The write protect input, when connected to GND, allows nor-
mal write operations. When WP is connected high to V CC , all write operations to the
memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down
to GND if the capacitive coupling to the circuit board V CC plane is <3 pF. If coupling is
>3 pF, Atmel recommends connecting the pin to GND. Switching WP to V CC prior to a
write operation creates a software write protect function.
AT24C512, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of
128-bytes each. Random word addressing requires a 16-bit data word address.
3
1116O–SEEPR–1/07
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