参数资料
| 型号： | AT32AP7002-CTUR |
| 厂商： | Atmel |
| 文件页数： | 67/83页 |
| 文件大小： | 0K |
| 描述： | IC MCU AVR32 196-CBGA |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 1 |
| 系列： | AVR®32 AP7 |
| 核心处理器： | AVR |
| 芯体尺寸： | 32-位 |
| 速度： | 150MHz |
| 连通性： | EBI/EMI，I²C，MMC，PS2，SPI，SSC，UART/USART，USB |
| 外围设备： | AC'97，DMA，I²S，LCD，POR，PWM，WDT |
| 输入/输出数： | 85 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 32K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.65 V ~ 1.95 V |
| 数据转换器： | D/A 2x16b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 196-TFBGA，CSBGA |
| 包装： | 标准包装 |
| 其它名称： | AT32AP7002-CTURDKR |
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2011 Microchip Technology Inc.
DS70118J-page 61
dsPIC30F2010
10.0
TIMER2/3 MODULE
This section describes the 32-bit general purpose
Timer module (Timer2/3) and associated operational
modes. Figure 10-1 depicts the simplified block dia-
gram of the 32-bit Timer2/3 module. Figure 10-2 and
show
Timer2/3
configured
as
two
independent
16-bit
timers;
Timer2
and
Timer3,
respectively.
The Timer2/3 module is a 32-bit timer, which can be
configured as two 16-bit timers, with selectable operat-
ing modes. These timers are utilized by other
peripheral modules such as:
Input Capture
Output Compare/Simple PWM
The following sections provide a detailed description,
including setup and control registers, along with asso-
ciated block diagrams for the operational modes of the
timers.
The 32-bit timer has the following modes:
Two independent 16-bit timers (Timer2 and
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Single 32-bit Timer operation
Single 32-bit Synchronous Counter
Further, the following operational characteristics are
supported:
ADC Event Trigger
Timer Gate Operation
Selectable Prescaler Settings
Timer Operation during Idle and Sleep modes
Interrupt on a 32-bit Period Register Match
These operating modes are determined by setting the
appropriate bit(s) in the 16-bit T2CON and T3CON
SFRs.
For 32-bit timer/counter operation, Timer2 is the least
significant word and Timer3 is the most significant word
of the 32-bit timer.
16-bit Mode: In the 16-bit mode, Timer2 and Timer3
can be configured as two independent 16-bit timers.
Each timer can be set up in either 16-bit Timer mode or
16-bit Synchronous Counter mode. See Section 9.0
“Timer1 Module” for details on these two operating
modes.
The only functional difference between Timer2 and
Timer3 is that Timer2 provides synchronization of the
clock prescaler output. This is useful for high frequency
external clock inputs.
32-bit Timer Mode: In the 32-bit Timer mode, the timer
increments on every instruction cycle up to a match
value, preloaded into the combined 32-bit period regis-
ter PR3/PR2, then resets to ‘0’ and continues to count.
For synchronous 32-bit reads of the Timer2/Timer3
pair, reading the least significant word (TMR2 register)
will cause the most significant word (msw) to be read
and latched into a 16-bit holding register, termed
TMR3HLD.
For synchronous 32-bit writes, the holding register
(TMR3HLD) must first be written to. When followed by
a write to the TMR2 register, the contents of TMR3HLD
will be transferred and latched into the MSB of the
32-bit timer (TMR3).
32-bit Synchronous Counter Mode: In the 32-bit
Synchronous Counter mode, the timer increments on
the rising edge of the applied external clock signal,
which is synchronized with the internal phase clocks.
The timer counts up to a match value preloaded in the
combined 32-bit period register PR3/PR2, then resets
to ‘0’ and continues.
When the timer is configured for the Synchronous
Counter mode of operation and the CPU goes into the
Idle mode, the timer will stop incrementing, unless the
TSIDL (T2CON<13>) bit = ‘0’. If TSIDL = ‘1’, the timer
module logic will resume the incrementing sequence
upon termination of the CPU Idle mode.
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
Note:
Timer2 is a ‘Type B’ timer and Timer3 is a
‘Type C’ timer. Please refer to the
appropriate timer type in Section 22.0
“Electrical Characteristics” for details.
Note:
For 32-bit timer operation, T3CON control
bits are ignored. Only T2CON control bits
are used for setup and control. Timer 2
clock and gate inputs are utilized for the
32-bit timer module, but an interrupt is
generated with the Timer3 interrupt flag
(T3IF), and the interrupt is enabled with
the Timer3 interrupt enable bit (T3IE).
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