参数资料
型号: AT32AP7002-CTUR
厂商: Atmel
文件页数: 8/83页
文件大小: 0K
描述: IC MCU AVR32 196-CBGA
产品培训模块: MCU Product Line Introduction
标准包装: 1
系列: AVR®32 AP7
核心处理器: AVR
芯体尺寸: 32-位
速度: 150MHz
连通性: EBI/EMI,I²C,MMC,PS2,SPI,SSC,UART/USART,USB
外围设备: AC'97,DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 85
程序存储器类型: ROMless
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 1.95 V
数据转换器: D/A 2x16b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 196-TFBGA,CSBGA
包装: 标准包装
其它名称: AT32AP7002-CTURDKR
16
32054F–AVR32–09/09
AT32AP7002
5.
I/O Line Considerations
5.1
JTAG pins
The TMS, TDI and TCK pins have pull-up resistors. TDO is an output, driven at up to VDDIO,
and have no pull-up resistor. The TRST_N pin is used to initialize the embedded JTAG TAP
Controller when asserted at a low level. It is a schmitt input and integrates permanent pull-up
resistor to VDDIO, so that it can be left unconnected for normal operations.
5.2
WAKE_N pin
The WAKE_N pin is a schmitt trigger input integrating a permanent pull-up resistor to VDDIO.
5.3
RESET_N pin
The RESET_N pin is a schmitt input and integrates a permanent pull-up resistor to VDDIO. As
the product integrates a power-on reset cell, the RESET_N pin can be left unconnected in case
no reset from the system needs to be applied to the product.
5.4
EVTI_N pin
The EVTI_N pin is a schmitt input and integrates a non-programmable pull-up resistor to VDDIO.
5.5
TWI pins
When these pins are used for TWI, the pins are open-drain outputs with slew-rate limitation and
inputs with inputs with spike-filtering. When used as GPIO-pins or used for other peripherals, the
pins have the same characteristics as PIO pins.
5.6
PIO pins
All the I/O lines integrate a programmable pull-up resistor
. Programming of this pull-up resistor is
performed independently for each I/O line through the PIO Controllers. After reset, I/O lines
default as inputs with pull-up resistors enabled, except when indicated otherwise in the column
“Reset State” of the PIO Controller multiplexing tables.
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