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| 型号： | AT45DB011D_07 |
| 厂商： | Atmel Corp. |
| 英文描述： | 1-megabit 2.7-volt DataFlash |
| 中文描述： | 1兆位2.7伏的DataFlash |
| 文件页数： | 6/52页 |
| 文件大小： | 1107K |
| 代理商： | AT45DB011D_07 |
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6
3639B–DFLASH–02/07
AT45DB011D [Preliminary]
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The maximum SCK frequency allowable for the Continuous
Array Read is defined by the f
CAR1
specification. The Continuous Array Read bypasses the data
buffer and leaves the contents of the buffer unchanged.
6.3
Continuous Array Read (Low Frequency Mode: 03H): Up to 33 MHz
This command can be used with the serial interface to read the main memory array sequentially
without a dummy byte up to maximum frequencies specified by f
CAR2
. To perform a continuous
read array with the page size set to 264 bytes, the CS must first be asserted then an opcode,
03H, must be clocked into the device followed by three address bytes (which comprise the 24-bit
page and byte address sequence). The first 9 bits (PA8 - PA0) of the 18-bit address sequence
specify which page of the main memory array to read, and the last 9 bits (BA8 - BA0) of the
18-bit address sequence specify the starting byte address within the page. To perform a contin-
uous read with the page size set to 256 bytes, the opcode, 03H, must be clocked into the device
followed by three address bytes (A16 - A0). Following the address bytes, additional clock pulses
on the SCK pin will result in data being output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The Continuous Array Read bypasses the data buffer and
leaves the contents of the buffer unchanged.
6.4
Main Memory Page Read
A main memory page read allows the user to read data directly from any one of the 2,048 pages
in the main memory, bypassing the data buffer and leaving the contents of the buffer
unchanged. To start a page read from the DataFlash standard page size (264 bytes), an opcode
of D2H must be clocked into the device followed by three address bytes (which comprise the
24-bit page and byte address sequence) and 4 don’t care bytes. The first 9 bits (PA8 - PA0) of
the 18-bit address sequence specify the page in main memory to be read, and the last 9 bits
(BA8 - BA0) of the 18-bit address sequence specify the starting byte address within that page.
To start a page read from the binary page size (256 bytes), the opcode D2H must be
clocked into the device followed by three address bytes and 4 don’t care bytes. The first 9 bits
(A16 - A8) of the 17-bit sequence specify which page of the main memory array to read, and the
last 8 bits (A7 - A0) of the 17-bit address sequence specify the starting byte address within the
page. The don’t care bytes that follow the address bytes are sent to initialize the read operation.
Following the don’t care bytes, additional pulses on SCK result in data being output on the SO
(serial output) pin. The CS pin must remain low during the loading of the opcode, the address
bytes, the don’t care bytes, and the reading of data. When the end of a page in main memory is
相关PDF资料 |
PDF描述 |
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| AT45DB011D-MU | 1-megabit 2.7-volt DataFlash |
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| AT45DB011 | 1-megabit 2.7-volt Only Serial DataFlash(1M位 2.7V串行数据闪速存储器) |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT45DB011D-DWF | 制造商:Adesto Technologies Corporation 功能描述:1M DATAFLASH, 8-UDFN,IND,GRN,NIPDAU - 1MB, DATAFLASH, WAFER, - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:Adesto Technologies Corporation 功能描述:DIE/WAFER FLASH 1MBIT 66MHZ |
| AT45DB011D-MH SL954 | 制造商:Adesto Technologies Corporation 功能描述:IC FLASH 1MBIT 66MHZ 8UDFN |
| AT45DB011D-MH-SL954 | 制造商:Adesto Technologies Corporation 功能描述:8-UDFN (5X6), IND TEMP, 2.7V, TRAY, 256 BYTE PAGE - Trays 制造商:Adesto Technologies Corporation 功能描述:Flash 1M, 66MHz, 2.7-3.6V DataFlash |
| AT45DB011D-MH-SL955 | 制造商:Adesto Technologies Corporation 功能描述:8-UDFN (5X6), IND TEMP, 2.7V, T&R, 256 BYTE PAGE - Tape and Reel 制造商:Adesto Technologies Corporation 功能描述:IC FLASH 1MBIT 66MHZ 8UDFN 制造商:Adesto Technologies Corporation 功能描述:Flash 1M, 66MHz 2.7-3.6V DataFlash |
| AT45DB011D-MH-T | 功能描述:闪存 1M 2.7-3.6V, 66Mhz Serial 闪存 RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
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