参数资料
型号: AT45DB021B-TU
厂商: ATMEL CORP
元件分类: DRAM
英文描述: 2-megabit 2.7-volt Only DataFlash
中文描述: 2M X 1 FLASH 2.7V PROM, PDSO28
封装: 18 X 13.40 MM, GREEN, PLASTIC, MO-183, TSOP1-28
文件页数: 8/32页
文件大小: 304K
代理商: AT45DB021B-TU
8
1937J–DFLSH–9/05
AT45DB021B
5.3
Additional Commands
5.3.1
Main Memory Page to Buffer Transfer
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation, an 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by the
five reserved bits, 10 address bits (PA9-PA0) which specify the page in main memory that is to
be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the
page of data from the main memory to the buffer will begin when the CS pin transitions from a
low to a high state. During the transfer of a page of data (t
XFR
), the status register can be read to
determine whether the transfer has been completed or not.
5.3.2
Main Memory Page to Buffer Compare
A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate
the operation, an 8-bit opcode (60H for buffer 1 and 61H for buffer 2) must be followed by 24
address bits consisting of the five reserved bits, 10 address bits (PA9-PA0) which specify the
page in the main memory that is to be compared to the buffer, and nine don’t care bits. The CS
pin must be low while toggling the SCK pin to load the opcode, the address bits and the don’t
care bits from the SI pin. On the low-to-high transition of the CS pin, the 264 bytes in the
selected main memory page will be compared with the 264 bytes in buffer 1 or buffer 2. During
this time (t
XFR
), the status register will indicate that the part is busy. On completion of the com-
pare operation, bit 6 of the status register is updated with the result of the compare.
5.3.3
Auto Page Rewrite
This mode is needed only if multiple bytes within a page or multiple pages of data are modified in
a random fashion. This mode is a combination of two operations: Main Memory Page to Buffer
Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of data is first
transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1
or buffer 2) is programmed back into its original page of main memory. To start the rewrite oper-
ation, an 8-bit opcode (58H for buffer 1 or 59H for buffer 2) must be followed by the five reserved
bits, 10 address bits (PA9-PA0) that specify the page in main memory to be rewritten, and nine
additional don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first
transfer data from the page in main memory to a buffer and then program the data from the
buffer back into same page of main memory. The operation is internally self-timed and should
take place in a maximum time of t
EP
. During this time, the status register will indicate that the
part is busy.
If a sector is programmed or reprogrammed sequentially page-by-page, then the programming
algorithm shown in
Figure 15-1
on
page 25
is recommended. Otherwise, if multiple bytes in a
page or several pages are programmed randomly in a sector, then the programming algorithm
shown in
Figure 15-2
on
page 26
is recommended. Each page within a sector must be
updated/rewritten at least once within every 10,000 cumulative page erase/program operations
in that sector.
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