参数资料
| 型号： | AT45DB041B-TC |
| 厂商： | Atmel |
| 文件页数： | 5/35页 |
| 文件大小： | 0K |
| 描述： | IC FLASH 4MBIT 20MHZ 28TSOP |
| 标准包装： | 234 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | DataFLASH |
| 存储容量： | 4M（2048 页 x 264 字节） |
| 速度： | 20MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 28-TSSOP（0.465"，11.8mm 宽） |
| 供应商设备封装： | 28-TSOP |
| 包装： | 托盘 |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
AT45DB041B
A low-to-high transition on the CS pin will terminate the read operation and tri-state the SO pin.
The maximum SCK frequency allowable for the Continuous Array Read is defined by the f CAR
specification. The Continuous Array Read bypasses both data buffers and leaves the contents
of the buffers unchanged.
5.1.2
5.1.3
5.1.4
Main Memory Page Read
A Main Memory Page Read allows the user to read data directly from any one of the 2048 pages
in the main memory, bypassing both of the data buffers and leaving the contents of the buffers
unchanged. To start a page read, an opcode of 52H or D2H must be clocked into the device fol-
lowed by 24 address bits and 32 don ’t care bits. The first four bits of the 24-bit address
sequence are reserved bits, the next 11 address bits (PA10 - PA0) specify the page address,
and the next nine address bits (BA8 - BA0) specify the starting byte address within the page.
The 32 don’t care bits which follow the 24 address bits are sent to initialize the read operation.
Following the 32 don’t care bits, additional pulses on SCK result in serial data being output on
the SO (serial output) pin. The CS pin must remain low during the loading of the opcode, the
address bits, the don’t care bits, and the reading of data. When the end of a page in main mem-
ory is reached during a Main Memory Page Read, the device will continue reading at the
beginning of the same page. A low-to-high transition on the CS pin will terminate the read oper-
ation and tri-state the SO pin.
Buffer Read
Data can be read from either one of the two buffers, using different opcodes to specify which
buffer to read from. An opcode of 54H or D4H is used to read data from buffer 1, and an opcode
of 56H or D6H is used to read data from buffer 2. To perform a Buffer Read, the eight bits of the
opcode must be followed by 15 don’t care bits, nine address bits, and eight don’t care bits. Since
the buffer size is 264 bytes, nine address bits (BFA8 - BFA0) are required to specify the first byte
of data to be read from the buffer. The CS pin must remain low during the loading of the opcode,
the address bits, the don ’t care bits, and the reading of data. When the end of a buffer is
reached, the device will continue reading back at the beginning of the buffer. A low-to-high tran-
sition on the CS pin will terminate the read operation and tri-state the SO pin.
Status Register Read
The status register can be used to determine the device’s Ready/Busy status, the result of a
Main Memory Page to Buffer Compare operation, or the device density. To read the status reg-
ister, an opcode of 57H or D7H must be loaded into the device. After the last bit of the opcode is
shifted in, the eight bits of the status register, starting with the MSB (bit 7), will be shifted out on
the SO pin during the next eight clock cycles. The five most significant bits of the status register
will contain device information, while the remaining three least-significant bits are reserved for
future use and will have undefined values. After bit 0 of the status register has been shifted out,
the sequence will repeat itself (as long as CS remains low and SCK is being toggled) starting
again with bit 7. The data in the status register is constantly updated, so each repeating
sequence will output new data.
Table 5-1.
Status Register Format
Bit 7
RDY/BUSY
Bit 6
COMP
Bit 5
0
Bit 4
1
Bit 3
1
Bit 2
1
Bit 1
X
Bit 0
X
5
3443D–DFLSH–2/08
相关PDF资料 |
PDF描述 |
|---|---|
| 395-030-521-802 | CARD EDGE 30POS DL .100X.200 BLK |
| 395-030-521-801 | CARD EDGE 30POS DL .100X.200 BLK |
| 395-030-521-204 | CARD EDGE 30POS DL .100X.200 BLK |
| 395-030-521-202 | CARD EDGE 30POS DL .100X.200 BLK |
| SOMOMAP3503-11-1670HFCR | SYSTEM ON MODULE LV OMAP3503 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT45DB041B-TC-2.5 | 功能描述:IC FLASH 4MBIT 20MHZ 28TSOP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:378 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-CBGA 供应商设备封装:48-CBGA（7x7） 包装:托盘 |
| AT45DB041B-TI | 功能描述:IC FLASH 4MBIT 20MHZ 28TSOP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:32 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (128K x 8) 速度:120ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:32-LCC（J 形引线） 供应商设备封装:32-PLCC 包装:管件 其它名称:AT49BV00112JC |
| AT45DB041B-TI-2.5 | 功能描述:IC FLASH 4MBIT 20MHZ 28TSOP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:378 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-CBGA 供应商设备封装:48-CBGA（7x7） 包装:托盘 |
| AT45DB041B-TU | 功能描述:IC FLASH 4MBIT 20MHZ 28TSOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:RAM 存储器类型:SDRAM 存储容量:256M（8Mx32） 速度:143MHz 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:90-VFBGA 供应商设备封装:90-VFBGA（8x13） 包装:托盘 其它名称:Q2841869 |
| AT45DB041-CC | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:4-Megabit 2.7-volt Only Serial DataFlash |
发布紧急采购，3分钟左右您将得到回复。