参数资料
型号: AT49SN6416T
厂商: Atmel Corp.
英文描述: 64-megabit (4M x 16) Burst/Page Mode 1.8-volt Flash Memory
中文描述: 64兆位(4米× 16)突发/页模式1.8伏的快闪记忆体
文件页数: 19/42页
文件大小: 418K
代理商: AT49SN6416T
19
3464C–FLASH–2/05
AT49SN6416(T)
Notes:
1. The DATA FORMAT shown for each bus cycle is as follows; I/O7 - I/O0 (Hex). I/O15 - I/O8 are don’t care. The ADDRESS
FORMAT shown for each bus cycle is as follows: A7 - A0 (Hex). Address A21 through A8 are don’t care.
2. PA is the plane address (A21 - A20). Any address within a plane can be used.
3. SA = sector address. Any word address within a sector can be used to designate the sector address (see pages
23
-
26
for
details).
4. The first bus cycle address should be the same as the word address to be programmed.
5. The status register bits are output on I/O7 - I/O0.
6. If data bit D1 is “0”, sector B is locked. If data bit D1 is “1”, sector B can be reprogrammed.
7. See
“Burst Configuration Register Table” on page 21
. Bits B15 - B0 of the burst configuration register determine A15 - A0.
Addresses A16 - A21 can select any plane.
8.
For the AT49SN6416:
For the AT49SN6416T:
xxx = 000005 Burst Configuration Register Data from Plane A
xxx = 100005 Burst Configuration Register Data from Plane B
xxx = 200005 Burst Configuration Register Data from Plane C
xxx = 300005 Burst Configuration Register Data from Plane D
9. Any address within the user programmable protection register region. Please see
“Protection Register Addressing Table” on
page 20
.
10. This fast programming option enables the user to program two words in parallel only when V
PP
= 10V. The addresses, Addr0
and Addr1, of the two words, D
IN0
and D
IN1
, must only differ in address A0. This command should be used during manufac-
turing purposes only.
11. During the second bus sycle, the manufacturer code is read from address PA+00000H, the device code is read from address
PA+00001H, and the data in the protection register is read from addresses 000081H - 000088H (AT49SN6416) or
addresses 3F8081H - 3F8088H (AT49SN6416T).
12. The plane address should be the same during the first and second bus cycle.
13. For the AT49SN6416, xxxx = 0000H. For the AT49SN6416T, xxxx = 3F80H.
xxx = 000005 Burst Configuration Register Data from Plane D
xxx = 100005 Burst Configuration Register Data from Plane C
xxx = 200005 Burst Configuration Register Data from Plane B
xxx = 300005 Burst Configuration Register Data from Plane A
4.
Command Definition Table
Command
Sequence
Bus
Cycles
1st Bus
Cycle
2nd Bus
Cycle
Addr
3rd Bus
Cycle
Addr
PA
(2)
Data
Data
Addr
Data
Read
1
FF
Chip Erase
2
XX
21
Addr
D0
Plane Erase
2
XX
22
Addr
D0
Sector Erase
2
SA
(3)
20
SA
(3)
D0
Word Program
2
Addr
(4)
40/10
Addr
(4)
D
IN
D
IN0
Dual Word Program
(10)
3
Addr0
E0
Addr0
Addr1
D
IN1
Erase/Program Suspend
1
XX
B0
Erase/Program Resume
1
PA
(2)
D0
Product ID Entry
(11)(12)
1
PA
(2)
90
Sector Softlock
2
SA
(3)
60
SA
(3)
01
Sector Hardlock
2
SA
(3)
60
SA
(3)
2F
Sector Unlock
2
SA
(3)
60
SA
(3)
D0
Read Status Register
2
PA
(2)
70
XX
D
OUT
(5)
Clear Status Register
1
XX
50
Program Protection Register
2
XX
(9)
C0
XX
(9)
D
IN
FFFD
Lock Protection Register – Sector B
2
XXXX 80
(13)
C0
XXXX 80
(13)
Status of Sector B Protection
2
XXXX 80
(13)
90
XXXX 80
(13)
D
OUT
03
(6)
Program Burst Configuration Register
2
Addr
(7)
60
Addr
(7)
Read Burst Configuration Register
2
PA
(2)
90
XXX
(8)
D
OUT
CFI Query
1
XX
98
相关PDF资料
PDF描述
AT49SN6416T-70CI 64-megabit (4M x 16) Burst/Page Mode 1.8-volt Flash Memory
AT49SN6416 64-megabit (4M x 16) Burst/Page Mode 1.8-volt Flash Memory
AT49SV322A 32-megabit (2M x 16/4M x 8) 1.8-volt Only Flash Memory
AT49SV322AT 32-megabit (2M x 16/4M x 8) 1.8-volt Only Flash Memory
AT49SV802A-90CI 8-megabit 1.8-volt Only Flash Memory
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