参数资料
型号: AT86RF232-ZX
厂商: Atmel
文件页数: 25/175页
文件大小: 0K
描述: 2.4 GHZ ZIGBEE TRANSCEIVER
产品培训模块: AT86RF232 Low Power 2.4 GHz Wireless Transceiver
标准包装: 2,450
频率: 2.4GHz
数据传输率 - 最大: 250kbps
调制或协议: 802.15.4 Zigbee,6LoWPAN,ISM
应用: 通用
功率 - 输出: 3dBm
灵敏度: -100dBm
电源电压: 1.8 V ~ 3.6 V
电流 - 接收: 11.8mA
电流 - 传输: 13.8mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 托盘
AT86RF232
6.6 Interrupt Logic
6.6.1 Overview
The Atmel AT86RF232 differentiates between nine interrupt events (eight physical
interrupt registers, one shared by two functions). Each interrupt is enabled by setting
the corresponding bit in the interrupt mask register 0x0E (IRQ_MASK). Internally, each
pending interrupt is stored in a separate bit of the interrupt status register. All interrupt
events are OR-combined to a single external interrupt signal (IRQ pin). If an interrupt is
issued,
pin 24 (IRQ) = H,
the microcontroller
shall
read the interrupt status
register 0x0F (IRQ_STATUS) to determine the source of the interrupt. A read access to
this register clears the interrupt status register and thus the IRQ pin, too.
Interrupts are not cleared automatically when the event that caused them vanishes.
Exceptions
are
IRQ_0 (PLL_LOCK)
and
IRQ_1 (PLL_UNLOCK)
because
the
occurrence of one clears the other.
The supported interrupts for the Basic Operating Mode are summarized in Table 6-10 .
Table 6-10. Interrupt Description in Basic Operating Mode.
IRQ Name
IRQ_7 (BAT_LOW)
IRQ_6 (TRX_UR)
IRQ_5 (AMI)
IRQ_4 (CCA_ED_DONE)
IRQ_3 (TRX_END)
IRQ_2 (RX_START)
IRQ_1 (PLL_UNLOCK)
IRQ_0 (PLL_LOCK)
Description
Indicates a supply voltage below the programmed threshold.
Indicates a Frame Buffer access violation.
Indicates an address match.
Multi-functional interrupt:
1. AWAKE_END:
?
Indicates finished transition to TRX_OFF state from P_ON, SLEEP, or RESET
state.
2. CCA_ED_DONE:
? Indicates the end of a CCA or ED measurement.
RX: Indicates the completion of a frame reception.
TX: Indicates the completion of a frame transmission.
Indicates the start of a PSDU reception. Register bits TRX_STATUS changes to
BUSY_RX, the PHR is valid to be read from Frame Buffer.
Indicates PLL unlock. If the radio transceiver is in BUSY_TX / BUSY_TX_ARET state,
the PA is turned off immediately.
Indicates PLL lock.
Section
9.5.4
9.3.3
7.2.3.4
7.1.2.3
8.4.4
8.5.4
7.1.3
7.1.3
7.1.3
9.7.5
9.7.5
Note:
1.
The IRQ_4 (AWAKE_END) interrupt can usually not be seen when the
transceiver enters TRX_OFF state after P_ON, or RESET, because
register 0x0E (IRQ_MASK) is reset to mask all interrupts. It is recommended to
enable IRQ_4 (AWAKE_END) to be notified once the TRX_OFF state is
entered.
The interrupt handling in Extended Operating Mode is described in Section 7.2.5 .
25
8321A – MCU Wireless – 10/11
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