参数资料
型号: AT86RF232-ZX
厂商: Atmel
文件页数: 59/175页
文件大小: 0K
描述: 2.4 GHZ ZIGBEE TRANSCEIVER
产品培训模块: AT86RF232 Low Power 2.4 GHz Wireless Transceiver
标准包装: 2,450
频率: 2.4GHz
数据传输率 - 最大: 250kbps
调制或协议: 802.15.4 Zigbee,6LoWPAN,ISM
应用: 通用
功率 - 输出: 3dBm
灵敏度: -100dBm
电源电压: 1.8 V ~ 3.6 V
电流 - 接收: 11.8mA
电流 - 传输: 13.8mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 托盘
AT86RF232
Overview
The implemented TX_ARET algorithm is shown in Figure 7-14 .
In TX_ARET mode, the Atmel AT86RF232 first executes the CSMA-CA algorithm, as
defined by IEEE 802.15.4 – 2006, Section 7.5.1.4, initiated by a transmit start event. If
the channel is IDLE a frame is transmitted from the Frame Buffer. If the
acknowledgement frame is requested the radio transceiver additionally checks for an
ACK reply.
The
completion of the
TX_ARET
transmit
transaction
is
indicated
by
an
IRQ_3 (TRX_END) interrupt.
Description
Configuration and address bits are to be set in TRX_OFF or PLL_ON state prior to
switching to TX_ARET mode. It is further recommended to transfer the PSDU data to
the Frame Buffer in advance. The transaction is started by either
using
pin 11 (SLP_TR), refer to Section 6.5 , or writing a TX_START command to register bits
TRX_CMD (register 0x02, TRX_STATE).
If the CSMA-CA detects a busy channel, it is retried as specified by the register bits
MAX_CSMA_RETRIES (register 0x2C, XAH_CTRL_0). In case that CSMA-CA does
not detect a clear channel after MAX_CSMA_RETRIES, it aborts the TX_ARET
transaction, issues interrupt IRQ_3 (TRX_END), and set the value of the register bits
TRAC_STATUS to CHANNEL_ACCESS_FAILURE.
During transmission of a frame the radio transceiver parses bit 5 (ACK Request) of the
MAC header (MHR) frame control field of the PSDU data (PSDU octet #1) to be
transmitted to check if an ACK reply is expected.
If an ACK is expected, the radio transceiver automatically switches into receive mode to
wait for a valid ACK reply. After receiving an ACK frame the Frame Pending subfield of
that frame is parsed and the status register bits TRAC_STATUS are updated
accordingly, refer to Table 7-12 . This receive procedure does not overwrite the Frame
Buffer content. Transmit data in the Frame Buffer is not changed during the entire
TX_ARET transaction. Received frames other than the expected ACK frame are
discarded.
If no valid ACK is received or after timeout of 54 symbol periods (864μs), the radio
transceiver retries the entire transaction, (including CSMA-CA) until the maximum
number of retransmissions (as set by the register bits MAX_FRAME_RETRIES
(register 0x2C, XAH_CTRL_0)) is exceeded.
The current CSMA-CA and frame retransmission counter values of an ongoing
TX_ARET transaction can be retrieved by the register bits ARET_FRAME_RETRIES
and ARET_CSMA_RETRIES (register 0x19, XAH_CTRL_2).
Additionally to the RX Frame Time stamping via pin 10 (DIG2), a TX Frame Time
stamping within TX_ARET mode can be activated, if the register bits IRQ_2_EXT_EN
(register 0x04, TRX_CTRL_1) and ARET_TX_TS_EN (register 0x17, XAH_CTRL_1)
are set to one, see Section 11.4 .
After that, the microcontroller may read the value of the register bits TRAC_STATUS
(register 0x02, TRX_STATE) to verify whether the transaction was successful or not.
The register bits are set according to the following cases, additional exit codes are
described in Section 7.2.6 :
59
8321A – MCU Wireless – 10/11
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