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| 型号： | AT89C51AC2-RLTUM |
| 厂商： | Atmel |
| 文件页数： | 93/121页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 32K 44VQFP |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 800 |
| 系列： | 89C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 34 |
| 程序存储器容量： | 32KB（32K x 8） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 2K x 8 |
| RAM 容量： | 1.25K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 数据转换器： | A/D 8x10b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LQFP |
| 包装： | 托盘 |
| 产品目录页面： | 616 (CN2011-ZH PDF) |
| 配用： | AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU |
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73
A/T89C51AC2
4127H–8051–02/08
Watchdog Timer During
Power-down Mode and
Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in
Power-down mode, the user does not need to service the WDT. There are 2 methods of
exiting Power-down mode: by a hardware reset or via a level activated external interrupt
which is enabled prior to entering Power-down mode. When Power-down is exited with
hardware reset, the Watchdog is disabled. Exiting Power-down with an interrupt is sig-
nificantly different. The interrupt shall be held low long enough for the oscillator to
stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the
WDT from resetting the device while the interrupt pin is held low, the WDT is not started
until the interrupt is pulled high. It is suggested that the WDT be reset during the inter-
rupt service for the interrupt used to exit Power-down.
To ensure that the WDT does not overflow within a few states of exiting powerdown, it is
best to reset the WDT just before entering powerdown.
In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting
A/T89C51AC2 while in Idle mode, the user should always set up a timer that will period-
ically exit Idle, service the WDT, and re-enter Idle mode.
Register
Table 53. WDTPRG Register
WDTPRG (S:A7h)
Watchdog Timer Duration Programming Register
Reset Value = XXXX X000b
7
6
5
4
3
2
1
0
–
S2
S1
S0
Bit
Number
Bit
Mnemonic Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
S2
Watchdog Timer Duration selection bit 2
Work in conjunction with bit 1 and bit 0.
1
S1
Watchdog Timer Duration selection bit 1
Work in conjunction with bit 2 and bit 0.
0
S0
Watchdog Timer Duration selection bit 0
Work in conjunction with bit 1 and bit 2.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89C51AC2SLSUM | 制造商:Adesto Technologies Corporation 功能描述: |
| AT89C51AC2-SLSUM | 功能描述:8位微控制器 -MCU C51AC2 32K FLASHADC EEP 5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89C51AC3 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with 64KB Flash Memory |
| AT89C51AC3_04 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Microcontrollers |
| AT89C51AC3_05 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with 64KB Flash Memory |
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