参数资料
型号: AT89C51RC
厂商: Atmel Corp.
英文描述: 8-bit Microcontroller with 32K Bytes Flash(带32k字节闪速存储器、8位微控制器)
中文描述: 8位32K字节闪存(带32K的字节闪速存储器,微控制器8位微控制器)
文件页数: 5/29页
文件大小: 340K
代理商: AT89C51RC
5
AT45DB011B
1984B
09/01
five most significant bits of the status register will contain device information, while the remain-
ing three least significant bits are reserved for future use and will have undefined values. After
bit 0 of the status register has been shifted out, the sequence will repeat itself (as long as CS
remains low and SCK is being toggled) starting again with bit 7. The data in the status register
is constantly updated, so each repeating sequence will output new data.
Ready/Busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device
is not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy
state. The user can continuously poll bit 7 of the status register by stopping SCK at a low level
once bit 7 has been output. The status of bit 7 will continue to be output on the SO pin, and
once the device is no longer busy, the state of SO will change from 0 to 1. There are eight
operations which can cause the device to be in a busy state: Main Memory Page to Buffer
Transfer, Main Memory Page to Buffer Compare, Buffer to Main Memory Page Program with
Built-in Erase, Buffer to Main Memory Page Program without Built-in Erase, Page Erase,
Block Erase, Main Memory Page Program, and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated
using bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches
the data in the buffer. If bit 6 is a 1, then at least one bit of the data in the main memory page
does not match the data in the buffer.
The device density is indicated using bits 5, 4 and 3 of the status register. For the
AT45DB011B, the three bits are 0, 0 and 1. The decimal value of these three binary bits does
not equate to the device density; the three bits represent a combinational code relating to dif-
fering densities of Serial DataFlash devices, allowing a total of eight different density
configurations.
Program and
Erase Commands
BUFFER WRITE:
Data can be shifted in from the SI pin into the data buffer. To load data into
the buffer, an 8-bit opcode of 84H is followed by 15 don
t care bits and nine address bits
(BFA8-BFA0). The nine address bits specify the first byte in the buffer to be written. The data
is entered following the address bits. If the end of the data buffer is reached, the device will
wrap around back to the beginning of the buffer. Data will continue to be loaded into the buffer
until a low-to-high transition is detected on the CS pin.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH BUILT-IN ERASE:
Data written into
the buffer can be programmed into the main memory. An 8-bit opcode of 83H is followed by
the six reserved bits, nine address bits (PA8-PA0) that specify the page in the main memory
to be written, and nine additional don
t care bits. When a low-to-high transition occurs on the
CS pin, the part will first erase the selected page in main memory to all 1s and then program
the data stored in the buffer into the specified page in the main memory. Both the erase and
the programming of the page are internally self-timed and should take place in a maximum
time of t
EP
. During this time, the status register will indicate that the part is busy.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE:
A previously
erased page within main memory can be programmed with the contents of the buffer. An 8-bit
opcode of 88H is followed by the six reserved bits, nine address bits (PA8-PA0) that specify
the page in the main memory to be written, and nine additional don
t care bits. When a low-to-
high transition occurs on the CS pin, the part will program the data stored in the buffer into the
specified page in the main memory. It is necessary that the page in main memory that is being
programmed has been previously erased. The programming of the page is internally self-
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RDY/BUSY
COMP
0
0
1
X
X
X
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