参数资料
型号: AT91SAM7X-EK
厂商: Atmel
文件页数: 30/44页
文件大小: 0K
描述: KIT EVAL FOR AT91SAM7X256/128
产品培训模块: AT91SAM7X and SAM7XC Flash-based Microcontrollers
MCU Product Line Introduction
标准包装: 1
系列: AT91SAM 智能 ARM
类型: MCU
适用于相关产品: AT91SAM7X256,AT91SAM7X128
所含物品: 板,线缆,DVD,电源
相关产品: AT91SAM7X256-CU-999-ND - IC MCU ARM7 256KB FLASH 100TFBGA
AT91SAM7X128-CU-999-ND - IC MCU ARM7 128KB FLASH 100TFBGA
AT91SAM7X128-AU-999-ND - IC MCU ARM7 128KB FLASH 100LQFP
AT91SAM7X512-CU-ND - MCU ARM 512K HS FLASH 100-TFBGA
AT91SAM7X512-AU-ND - MCU ARM 512K HS FLASH 100-LQFP
AT91SAM7X256-CU-ND - MCU ARM 256K HS FLASH 100-TFBGA
AT91SAM7X128-CU-ND - MCU ARM 128K HS FLASH 100-TFBGA
AT91SAM7X256-AU-999TR-ND - IC ARM7 MCU 256K FLASH 100-LQFP
AT91SAM7X256-AU-ND - IC ARM7 MCU FLASH 256K 100LQFP
AT91SAM7X128-AU-ND - IC ARM7 MCU FLASH 128K 100LQFP
36
6120GS–ATARM–07-Apr-11
SAM7X512/256/128 Summary
– Pulse generation
– Delay timing
– Pulse Width Modulation
– Up/down capabilities
Each channel is user-configurable and contains:
– Three external clock inputs
Five internal clock inputs, as defined in Table 10-4
– Two multi-purpose input/output signals
– Two global registers that act on all three TC channels
10.12 Pulse Width Modulation Controller
Four channels, one 16-bit counter per channel
Common clock generator, providing thirteen different clocks
– One Modulo n counter providing eleven clocks
– Two independent linear dividers working on modulo n counter outputs
Independent channel programming
– Independent enable/disable commands
– Independent clock selection
– Independent period and duty cycle, with double buffering
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
10.13 USB Device Port
USB V2.0 full-speed compliant,12 Mbits per second
Embedded USB V2.0 full-speed transceiver
Embedded 1352-byte dual-port RAM for endpoints
Six endpoints
– Endpoint 0: 8 bytes
– Endpoint 1 and 2: 64 bytes ping-pong
– Endpoint 3: 64 bytes
– Endpoint 4 and 5: 256 bytes ping-pong
– Ping-pong Mode (two memory banks) for bulk endpoints
Suspend/resume logic
Table 10-4.
Timer Counter Clocks Assignment
TC Clock input
Clock
TIMER_CLOCK1
MCK/2
TIMER_CLOCK2
MCK/8
TIMER_CLOCK3
MCK/32
TIMER_CLOCK4
MCK/128
TIMER_CLOCK5
MCK/1024
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