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参数资料
| 型号： | BD9007HFP |
| 元件分类： | 稳压器 |
| 英文描述： | 2 A SWITCHING REGULATOR, 505 kHz SWITCHING FREQ-MAX, PSSO7 |
| 封装： | ROHS COMPLIANT, HRP-7 |
| 文件页数： | 4/18页 |
| 文件大小： | 484K |
| 代理商： | BD9007HFP |
BD9006F, BD9006HFP, BD9007F, BD9007HFP
Technical Note
12/17
www.rohm.com
2009.05 - Rev.A
2009 ROHM Co., Ltd. All rights reserved.
Point (b) fb=GBW=
[Hz]
Point (a) fa=
[Hz]
1
2πRCA
1
2πRC
●
Phase Compensation setting procedure
1．Application stability conditions
The following section describes the stability conditions of the negative feedback system.
Since the DC/DC converter application is sampled according to the switching frequency, GBW (frequency at 0-dB gain) of
the overall system should be set to 1/10 or less of the switching frequency. The following section summarizes the
targeted characteristics of this application.
·
At a 1 (0-dB) gain, the phase delay is 150 or less (i.e. the phase margin is 30 or more).
·
The GBW for this occasion is 1/10 or less of the switching frequency.
Responsiveness is determined with restrictions on the GBW. To improve responsiveness, higher switching frequency
should be provided.
Replace a secondary phase delay (-180) with a secondary phase lead by inserting two-phase leads, to ensure the
stability through the phase compensation. Furthermore, the GBW (i.e., frequency at 0-dB gain) is determined according
to phase compensation capacitance provided for the error amplifier. Consequently, in order to reduce the GBW, increase
the capacitance value.
(1) Typical integrator (low pass filter)
(2) Open loop characteristics of integrator
Since the error amplifier is provided with (1) or (2) phase compensation, the low pass filter is applied. In the case of the
DC/DC converter application, the R becomes a parallel resistance of the feedback resistance.
RT[k]
fosc[kHz]
RT[k]
fosc[kHz]
27
537
100
160
30
489
110
146
33
449
120
134
36
415
130
124
39
386
150
108
43
353
160
102
47
324
180
91
51
300
200
82
56
275
220
75
62
250
240
69
68
229
270
61
75
209
300
55
82
192
330
50
91
174
360
46
A
FB
C
R
Feedback
Fig.25 BD9006F Reference Layout Pattern
Fig.26 BD9006HFP Reference Layout Pattern
※
As shown above ,design the GND pattern as large as possible within inner layer.
※
Gray zones indicate GND.
Fig.27 RT Resistance Values vs.
Oscillating Frequency
※
The values in the graph for oscillating frequency are Typical values, and variance of±5%
forBD9006F/HFP and ±20% for BD9007F/HFP should be considered.
50
100
150
200
250
300
350
400
450
500
0
100
200
300
OSCILATING FREQUENCY SETTEING
RESISTANCE:RT[k]
OSCILATION
FREQUENCY:fosc[kHz]
L1
Co
C2
R4
R3
C3
R1
R2
RT
C2
8
CIN
D1
C1
Co
R3
C1
C3
D1
C2
R4
R1
R2
RT
L1
CIN
C2
8
0
-180
90
0
(a)
GBW(b)
-90°
A
-180°
位相マージン
-20dB/decade
Phase
[ °]
Gain
[dB]
f
Phase margin
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相关代理商/技术参数 |
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|---|---|
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| BD900A | 功能描述:达林顿晶体管 70W PNP Silicon RoHS:否 制造商:Texas Instruments 配置:Octal 晶体管极性:NPN 集电极—发射极最大电压 VCEO:50 V 发射极 - 基极电压 VEBO: 集电极—基极电压 VCBO: 最大直流电集电极电流:0.5 A 最大集电极截止电流: 功率耗散: 最大工作温度:+ 150 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-18 封装:Reel |
| BD900A-S | 功能描述:达林顿晶体管 80V 8A PNP RoHS:否 制造商:Texas Instruments 配置:Octal 晶体管极性:NPN 集电极—发射极最大电压 VCEO:50 V 发射极 - 基极电压 VEBO: 集电极—基极电压 VCBO: 最大直流电集电极电流:0.5 A 最大集电极截止电流: 功率耗散: 最大工作温度:+ 150 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-18 封装:Reel |
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