参数资料
型号: BD9300F-E2
厂商: Rohm Semiconductor
文件页数: 10/17页
文件大小: 0K
描述: IC REG CTRLR BST INV PWM 14-SOP
标准包装: 1
PWM 型: 控制器
输出数: 1
频率 - 最大: 800kHz
占空比: 100%
电源电压: 3.6 V ~ 35 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 14-SOIC(0.173",4.40mm 宽)
包装: 标准包装
产品目录页面: 1373 (CN2011-ZH PDF)
其它名称: BD9300F-E2DKR
(6) Phase compensation
Phase compensation setting procedure
The phase compensation setting procedure varies with the selection of output capacitors used for DC/DC converter
application. In this connection, the following section describes the procedure by classifying into the two types.
Furthermore, the application stability conditions are described in the Description section.
1. Application stability conditions
2. For output capacitors having high ESR, such as electrolytic capacitor
3. For output capacitors having low ESR, such as ceramic capacitor or OS-CON
1. Application stability conditions
The following section shows the stability conditions of negative feedback system.
. DSC, DVD, printer, DVD/DVD recorder, and other consumer productsAt a 1 (0-dB) gain,
the phase delay is 150 ? or less (i.e., the phase margin is 30 ? or more).
Furthermore, since the DC/DC converter application is sampled according to the switching frequency, GBW of the overall
system should be set to 1/10 or less of the switching frequency. The following section summarizes the targeted
characteristics of this application.
. DSC, DVD, printer, DVD/DVD recorder, and other consumer productsAt a 1 (0-dB) gain, the phase delay is 150 ? or
less (i.e., the phase margin is 30 ? or more).
. DSC, DVD, printer, DVD/DVD recorder, and other consumer productsThe GBW (i.e., frequency at 0-dB gain) for this
occasion is 1/10 or less of the switching frequency.
In other words, the responsiveness is determined with restrictions on the GBW. Consequently, in order to upgrade
the responsiveness, higher switching frequency should be provided.
In order to ensure the stability through the phase compensation, a secondary phase delay ( – 180 ? ) resulting from LC
resonance should be canceled with a secondary phase lead (i.e., through inserting two phase leads).
Furthermore, the GBW (i.e., frequency at 1-dB gain) is determined according to phase compensation capacitance to be
provided for the error amplifier. Consequently, in order to reduce the GBW, increase the capacitance value.
(1) Typical (sun) integrator (Low pass filter)
(2) Open loop characteristics of (mon) integrator
Feedback R
+
A
FB
Gain
[dB]
A
0
(a)
–20dB/decade
GBW(b)
f
C
Phase 0
[ ? ]
–90
–90 ?
–180
(a) point
(b) point
Phase margin
fa=
fb=GBW=
[Hz]
–180 ?
[Hz]
f
Fig. 22 Typical integrator characteristics
Since the error amplifier is provided with (sun) or (mon) phase compensation, the low pass filter is applied. In the case of
the DC/DC converter application, the R becomes a parallel resistance of the feedback resistance.
10/16
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