参数资料
| 型号： | BD9300F-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 8/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST INV PWM 14-SOP |
| 标准包装： | 1 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 800kHz |
| 占空比： | 100% |
| 电源电压： | 3.6 V ~ 35 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 是 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 14-SOIC（0.173"，4.40mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 1373 (CN2011-ZH PDF) |
| 其它名称： | BD9300F-E2DKR |
External component setting procedure
(1) Design of feedback resistance constant
Set step-down, step-up, and inverting feedback resistance as shown below. Set resistance in the range of 1 k Ω to
330 k Ω . Setting the resistance to 1 k Ω or less will result in degraded power efficiency, while setting it to 330 k Ω or
more will increase the offset voltage due to the input bias current of 0.1 μ A (TYP) of the error amplifier.
. Step-down voltage
Vo
Reference voltage: 1.25 V
R8
. Step-up voltage
Vo
Reference voltage: 1.25 V
R8
.
Inverting voltage
Vo (Negative)
R8
Reference voltage: 1.25 V
12
–
12
–
12
+
ERR
ERR
ERR
14
+
14
+
14
–
R9
R9
R9
11 VREF
Vo = X 1.25 [V]
Vo = X 1.25 [V]
Vo = 1.25 ( ) [V ]
1–
Fig. 15 Step-down voltage
R8+R9
R9
R8+R9
R9
Fig.16 Step-up voltage
Fig. 17 Inverting voltage
R8
R9
(2) Setting of oscillation frequency
Connecting a resistor and capacitor to the RT pin (pin 2) and the CT pin (pin 3) will set the triangular wave oscillation
frequency. The RT determines the charge/discharge current to the capacitor. Referring to Fig. 18, set RT resistor and
the CT capacitor. Recommended setting ranges are 5 to 100 k Ω for the CT resistor, 33 to 1000 pF for the CT capacitor,
and 20 kHz to 800 kHz for the oscillation frequency. Any setting outside of these ranges may turn OFF switching,
thus impairing the operation guarantee.
10000
1000
100
10
Ta=25 ? C
Vcc=12V
CT=33pF
CT=100pF
CT=200pF
CT=470pF
CT=1000pF
1
2
10
100
200
RT [k Ω ]
Fig. 18 RT/CT vs. Frequency
(3) Setting of DTC voltage
Applying the V DTC voltage to the DTC pin (pin 1) will fix the maximum duty ratio.This will serve to prevent the power
transistor (FET) from being FULL ON. Fig. 19 shows the relationship between the DTC voltage and the maximum duty
ratio. Referring to this Figure, set the DTC voltage.Next, generate the V DTC by dividing the V REF voltage with resistance
and then input the V DTC in the DTC pin.
120
100
80
60
40
20
0
Ta=25 ? C
Vcc=12V
Fosc=220kHz
-20
1.4
1.5
1.6
1.7
1.8
1.9
2
V DTC [V]
Fig. 19 DTC voltage vs. Maximum duty
Furthermore, the maximum duty ratio should be designed so as not to become a maximum duty for the normal use. The
following section shows ranges for the normal use.
. Step-down voltage
ONDutyMAX =
VOMAX
VCCMIN
. Step-up voltage
ONDutyMAX =
VOMAX – VOMIN
VOMAX
. nverting voltage
ONDutyMAX =
VOMAX
VOMAX – VCCMIN
8/16
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