参数资料
型号: BD9533EKN-E2
厂商: Rohm Semiconductor
文件页数: 8/23页
文件大小: 0K
描述: IC REG SW VAR SOFT START 20-HQFN
标准包装: 1
系列: H³Reg™
应用: 转换器,DDR SDRAM
输入电压: 4.5 V ~ 28 V
输出数: 1
输出电压: 0.7 V ~ 2 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘
供应商设备封装: 20-HQFN
包装: 标准包装
产品目录页面: 1373 (CN2011-ZH PDF)
其它名称: BD9533EKN-E2DKR
● Pin Descriptions
? GND(1pin)
This is the ground pin for IC internal circuits. It is equivalent to FIN voltage.
? VCC(2pin)
This is the power supply pin for IC internal circuits, except the FET driver. The maximum circuit current is 900uA. The input
supply voltage range is 4.5V to 5.5V. It is recommended that a 0.1uF bypass capacitor be put in this pin.
? ILIM(3pin)
BD9533EKN detects the voltage between Is+ pin and Is- pin and limits the output current (OCP). Voltage equivalent to 1/10
of the ILIM voltage is the voltage drop of external current sense resistor. A very low current sense resistor or inductor DCR
can also be used for this platform.
? EN(4pin)
When EN pin voltage is at least 2.3V, the status of this switching regulator becomes active. Conversely, the status switches
off when EN pin voltage goes lower than 0.8V and circuit current becomes 10uA.
? VIN(5pin)
The duty cycle is determined by input voltage and output voltage. In other words, the output voltage is affected by input
voltage. Therefore, when VIN voltage fluctuates, the output voltage becomes also unstable. Since the VIN line is also the
input voltage of the switching regulator, stability depends on the impedance of the voltage supply. It is recommended to
establish a bypass capacitor or CR filter suitable for the actual application.
? SLLM(6pin)
This is the switch shift pin for Simple Light Load Mode. The efficiency in SLLM is improved when SLLM pin voltage goes
lower than 0.5V.
? SCP(7pin)
This is the pin to adjust the timer latch time for short circuit protection. The timer circuit is active when the pin voltage
becomes 70% of REF, and the output switches OFF and latched after the specified time. When the UVLO circuit is active or
EN is low, this latch function is cancelled.
? Is-(8pin) ,Is+(9pin)
These pins are connected to both sides of the current sense resistor to detect output current. The voltage drop between Is+
and Is- is compared with the voltage equivalent to 1/10 of ILIM voltage. When this voltage drop reaches the specified
voltage level, the output voltage goes OFF.
? PGND(10pin)
This is the power ground pin connected to the source of the low side FET.
? LG(11pin)
This is the voltage supply to drive the Gate of the low side FET. This voltage swings between VDD and PGND. High-speed
Gate driving for the low side FET is achieved due to the low on-resistance (2 ohm when LG is high, 0.5 ohm when LG is low)
of the driver.
? VDD(12pin)
This is the power supply pin to drive the LOW side FET. It is recommended that a 1uF bypass capacitor be established to
compensate for rush current during the FET ON/OFF transition.
? SW(13pin)
This is the source pin for the high side FET. The maximum absolute ratings are 30V (from GND). SW voltage swings
between VIN and GND.
? HG(14pin)
This is the voltage supply to drive the Gate of the high side FET. This voltage swings between BOOT and SW. High-speed
Gate driving for the high side FET is achieved due to the low on-resistance (3 ohm when HG is high, 2 ohm when HG is low)
of the driver.
? BOOT(15pin)
This is the voltage supply to drive the high side FET. The maximum absolute ratings are 35V (from GND) and 7V (from SW).
BOOT voltage swings between VIN+Vcc and Vcc during active operation.
? SS(16pin)
This is the adjustment pin to set the soft start time. SS voltage is low during standby status. When EN is ON, the soft start
time can be determined by the SS charge current and capacitor between SS-GND. Until SS reaches REF voltage, the
output voltage is equivalent to SS voltage.
? FS(17pin)
This is the pin to adjust the switching frequency based on the resistor value. The frequency range is f=200KHz - 600KHz.
? VOUT(18pin)
This is the output voltage sense pin. It is also possible to adjust the output voltage using external resistor divider based on
the equation, REF ≒ VOUT.
? VREG(19pin)
This is the reference voltage output pin. The voltage is 2.5V, with 100uA current ability. It is recommended that a 1uF
capacitor (X5R or X7R) be established between VREG and GND. When REF is not adjusted from the external voltage
supply, the REF voltage can be adjusted using the external resistor divider of VREF.
? REF(20pin)
This is the output voltage adjustment pin. It is very convenient for synchronizing external voltage supply. The IC controls the
output voltage (REF ≒ VOUT).
8/20
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