参数资料
型号: BD95513MUV-E2
厂商: Rohm Semiconductor
文件页数: 10/20页
文件大小: 0K
描述: IC REG BUCK ADJ 3A 32VQFN
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.7 V ~ 5 V
输入电压: 4.5 V ~ 28 V
PWM 型: 混合物
频率 - 开关: 200kHz ~ 600kHz
电流 - 输出: 3A
同步整流器:
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
包装: 标准包装
供应商设备封装: VQFN032V5050
产品目录页面: 1373 (CN2011-ZH PDF)
其它名称: BD95513MUV-E2DKR
The BD95513MUV is a switching regulator incorporating ROHM’s proprietary H Reg
BD95513MUV
● Operation
3 TM
Technical Note
CONTROLLA control system.
Light Load Mode (SLLM ) controller, further improving system efficiency.
When V OUT drops suddenly due to changes in load, the system quickly restores the output voltage by extending the t on time
interval. This improves the regulator ’s transient response. When light-load mode is activated, the IC employs the Simple
TM
H 3 Reg TM Control
(Normal Operation)
V FB
When V FB falls below the reference voltage (0.7V),
the H Reg
V REF
3 TM
CONTROLLA is activated;
HG
t ON =
V REF
V IN
×
1
f
[sec] ??? (1)
High gate output is determined by the above formula.
LG
(Rapid Changes in Load)
Mode)
(SLLM
V FB
V REF
Io
HG
LG
Light Load Control
TM
t ON + α
When V OUT drops due to a sudden change in load and the
voltage remains below V REF after the preprogrammed t ON time
interval has elapsed, the system quickly restores V OUT by
extending the t ON time, thereby improving transient response.
V FB
SLLM
TM
mode is enabled by setting the MODE pin to logic high.
(current flowing from V OUT to SW), the SLLM
function is
V REF
HG
When the low gate is off and the current through the inductor is 0
TM
activated, disabling high gate output.
If V FB falls below V REF again, the high gate is switched back on,
lowering the switching frequency of the regulator and yielding
higher efficiency when powering light loads.
LG
0A
(QLLM Mode)
V FB
V REF
HG
LG
0A
QLLM mode is enabled by setting the MODE pin to HiZ or
middle voltage. When the lower gate is off and the current
through the inductor is 0 (current flowing from V OUT to SW),
QLLM mode is activated, disabling high gate output.
If V FB falls below V REF within a programmed time interval
(typ. 40 μs), the high gate is switched on, but if V FB does not fall
below V REF , the lower gate is forced on, dropping V FB and
switching the high gate back on.
The minimum switching frequency is set to 25 kHz (T = 40 μs),
which keeps the regulator ’s frequency from entering the audible
spectrum but yields less efficient results than SLLM TM mode.
www.rohm.com
? 2010 ROHM Co., Ltd. All rights reserved.
10/17
2010.10- Rev.A
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