参数资料
| 型号： | BR24L32FJ-WE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 28/41页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 32KBIT 400KHZ 8SOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 32K (4K x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOP-J |
| 包装： | 标准包装 |
| 产品目录页面： | 1379 (CN2011-ZH PDF) |
| 其它名称： | BR24L32FJ-WE2DKR |
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BR24L □□ -W Series,BR24S □□□ -W Series
Technical Note
● Write Command
○ Write cycle
? Arbitrary data is written to EEPROM. When to write only 1 byte, byte write normally used, and when to write continuous
data of 2 bytes or more, simultaneous write is possible by page write cycle. The maximum number of write bytes is
specified per device of each capacity.
Up to 64 arbitrary bytes can be written. (In the case of BR24S128/256-W)
S
W
T
A
R
I
S
T
R
T
SLAVE
ADDRESS
T
E
WORD
ADDRESS
DATA
O
P
SDA
LINE
1 0 1 0 A2 A1 A0
Note)
R A
/ C
WA
7
WA
0
A
C
D7
D0
A
C
W K
K
K
Fig.33 Byte write cycle (BR24S08/16-W)
S
W
T
A
R
I
S
T
R
T
SLAVE
ADDRESS
T
E
1st WORD
ADDRESS
2nd WORD
ADDRESS
DATA
O
P
*1
As for WA12, BR24S32-W becomes Don't care.
SDA
As for WA13, BR24S32/64-W becomes Don't care.
LINE
1 0 1 0 A2 A1 A0
Note)
R A
/ C
＊ WA WA WA WA
14 13 12 11
*1
A
C
WA
0
A
C
D7
D0
A
C
As for WA14, BR24S32/64/128-W becomes Don't care.
W K
K
K
K
Fig.34 Byte write cycle (BR24S32/64/128/256-W)
S
W
T
A
R
I
S
T
R
T
SLAVE
ADDRESS
T
E
W ORD
A D D R E S S (n )
D A T A (n )
D A T A (n + 1 5 )
*2
O
P
Note) )
SDA
L IN E
1 0 1 0 A 2 A 1 A 0
注
WA
7
R A
/ C *1
W K
WA
0
A
C
K
D7
D0
A
C
K
D0
A
C
K
Fig.35 Page write cycle (BR24S08/16-W)
S
W
T
R
S
SDA
L IN E
A
R
T
SLAVE
ADDRESS
1 0 1 0 A 2 A 1 A 0
I
T
E
1 st W O R D
A D D R E S S (n )
＊ W A W A W A W A
1 4 13 1 2 11
2nd W ORD
A D D R E S S (n )
WA
0
D7
D A T A (n )
D0
*2
D A TA (n + 3 1 )
D0
T
O
P
*1
As for WA12, BR24S32-W becomes Don't care.
As for WA13, BR24S32/64-W becomes Don't care.
As for WA14, BR24S32/64/128-W becomes Don't care.
N o te )
R A
/ C
W K
*1
A
C
K
A
C
K
A
C
K
A
C
K
*2 As for BR24S128/256-W becomes (n+63).
Fig.36 Page write cycle (BR24S32/64/128/256-W)
? Data is written to the address designated by word address (n-th address).
? By issuing stop bit after 8bit data input, write to memory cell inside starts.
? When internal write is started, command is not accepted for tWR (5ms at maximum).
? By page write cycle, the following can be written in bulk: Up to 16 bytes (BR24S08-W, BR24S16-W)
: Up to 32 bytes (BR24S32-W, BR24S64-W)
: Up to 64 bytes (BR24S128-W, BR24S256-W)
And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.
(Refer to "Internal address increment of "Notes on page write cycle" in P24/32.)
? As for page write command of BR24S08-W and, BR24S16-W, after page select bit(PS) of slave address is designated
arbitrarily, by continuing data input of 2 bytes or more, the address of insignificant 4 bits is incremented internally, and data
up to 16 bytes can be written.
? As for page write cycle of BR24S32-W and BR24S64-W , after the significant 7 bits (in the case of BR24S32-W) of word
address, or the significant 8 bits (in the case of BR24S64-W) of word address are designated arbitrarily, by continuing data
input of 2 bytes or more, the address of insignificant 5 bits is incremented internally, and data up to 32 bytes can be written.
? As for page write cycle of BR24S128-W and BR24S256-W, after the significant 9 bit (in the case of BR24S128-W) of word
address, or the significant 10bit (in the case of BR24S256-W) of word address are designated arbitrarily, by continuing
data input of 64 bytes or more.
Note)
*1 *2 *3
1 0 1 0 A 2 A 1 A 0
*1
*2
*3
In BR24S16-W, A2 becomes P2
In BR24S08/16-W, A1 becomes P1
In BR24S08/16-W, A0 becomes P0
Fig.37 Difference of slave address each type
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? 2009 ROHM Co., Ltd. All rights reserved.
28/40
2009.09 - Rev.D
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