参数资料
型号: BU-62743B3-102
厂商: DATA DEVICE CORP
元件分类: 微控制器/微处理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
封装: 0.815 X 0.815 INCH, 0.140 INCH HEIGHT, 1 MM PITCH, BGA-128
文件页数: 22/93页
文件大小: 504K
代理商: BU-62743B3-102
Data Device Corporation
62743_pre2.DOC.doc
www.ddc-web.com
8-15-01
29
TABLE 47. RT/MONITOR INTERRUPT STATUS WORD
(FOR INTERRUPT STATUS QUEUE)
BIT
DEFINITION FOR MESSAGE INTERRUPT
EVENT
DEFINITION FOR NON-MESSAGE
INTERRUPT EVENT
15
TRANSMITTER TIMEOUT
NOT USED
14
ILLEGAL COMMAND
NOT USED
13
MONITOR DATA STACK 50% ROLLOVER
NOT USED
12
MONITOR DATA STACK ROLLOVER
NOT USED
11
RT CIRCULAR BUFFER 50% ROLLOVER
NOT USED
10
RT CIRCULAR BUFFER ROLLOVER
NOT USED
9
MONITOR COMMAND (DESCRIPTOR) STACK
50% ROLLOVER
NOT USED
8
MONITOR COMMAND (DESCRIPTOR) STACK
ROLLOVER
NOT USED
7
RT COMMAND (DESCRIPTOR) STACK 50%
ROLLOVER
NOT USED
6
RT COMMAND (DESCRIPTOR) STACK
ROLLOVER
NOT USED
5
HANDSHAKE FAIL
NOT USED
4
FORMAT ERROR
TIME TAG ROLLOVER
3
MODE CODE INTERRUPT
RT ADDRESS PARITY ERROR
2
SUBADDRESS CONTROL WORD EOM
PROTOCOL SELF-TEST COMPLETE
1
END-OF-MESSAGE (EOM)
RAM PARITY ERROR
0
“1” FOR MESSAGE INTERRUPT EVENT;
“0” FOR NON-MESSAGE INTERRUPT EVENT
NON-TEST REGISTER FUNCTION SUMMARY
A summary of the PCI Enhanced Mini-ACE’s 24 non-test registers follows.
Interrupt Mask Registers #1 and #2 are used to enable and disable interrupt
requests for various events and conditions.
Configuration Registers #1 and #2 are used to select the PCI Enhanced Mini-
ACE’s mode of operation, and for software control of RT Status Word bits, Active
Memory Area, BC Stop-On-Error, RT Memory Management mode selection, and
control of the Time Tag operation.
Start/Reset Register is used for “command” type functions such as software
reset, BC/MT Start, Interrupt reset, Time Tag Reset, Time Tag Register Test,
Initiate protocol self-test, Initiate RAM self-test, Clear self-test register, and Clear
RT Halt. The Start/Reset Register also includes provisions for stopping the BC in
its auto-repeat mode, either at the end of the current message or at the end of
the current BC frame.
BC/RT Command Stack Register allows the host CPU to determine the pointer
location for the current or most recent message.
相关PDF资料
PDF描述
BU-62743B3-112L 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
BU-62743B4-140 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
BU-62743B4-190 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
BU-62843B3-122 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
BU-62843B3-150Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
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