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参数资料
| 型号： | BX80524R300128 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 300 MHz, MICROPROCESSOR, XMA |
| 封装： | SINGLE EDGE PROCESSOR PACKAGE |
| 文件页数： | 55/130页 |
| 文件大小： | 2654K |
| 代理商： | BX80524R300128 |
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30
Datasheet
Intel Celeron Processor up to 1.10 GHz
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VCCCORE and ICCCORE supply the processor core.
3. These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required.
4. Use the Typical Voltage specification with the Tolerance specifications to provide correct voltage regulation to
the processor.
5. VTT must be held to 1.5 V ± 9%. It is recommended that V TT be held to 1.5 V ± 3% while the Celeron
processor system bus is idle. This is measured at the processor edge fingers.
6. These are the tolerance requirements, across a 20 MHz bandwidth, at the SC242 connector pin on the
bottom side of the baseboard. The requirements at the SC242 connector pins account for voltage drops
(and impedance discontinuities) across the connector, processor edge fingers, and to the processor core.
VCCCORE must return to within the static voltage specification within 100 s after a transient event.
7. These are the tolerance requirements, across a 20 MHz bandwidth, at the processor edge fingers. The
requirements at the processor edge fingers account for voltage drops (and impedance discontinuities) at the
processor edge fingers and to the processor core. VCCCORE must return to within the static voltage
specification within 100
s after a transient event.
8. These are the tolerance requirements, across a 20 MHz bandwidth, at the top of the PPGA package.
VCCCORE must return to within the static voltage specification within 100 s after a transient event.
9. Max ICCCORE measurements are measured at VCCCORE max voltage (VCCCORE_TYP + maximum static
tolerance), under maximum signal loading conditions.
10.Voltage regulators may be designed with a minimum equivalent internal resistance to ensure that the output
voltage, at maximum current output, is no greater than the nominal (i.e., typical) voltage level of VCCCORE
(VCCCORE_TYP). In this case, the maximum current level for the regulator, ICCCORE_REG, can be reduced from
the specified maximum current ICCCORE_MAX and is calculated by the equation:
ICCCORE_REG = ICCCORE_MAX × VCCCORE_TYP/(VCCCORE_TYP + VCCCORE Tolerance, Transient)
11. The current specified is the current required for a single Intel Celeron processor. A similar amount of current
is drawn through the termination resistors on the opposite end of the AGTL+ bus, unless single-ended
termination is used (see Section 2.1).
12.The current specified is also for AutoHALT state.
13.Maximum values are specified by design/characterization at nominal VCCCORE.
14.Based on simulation and averaged over the duration of any change in current. Use to compute the maximum
inductance tolerable and reaction time of the voltage regulator. This parameter is not tested.
15.dICC/dt specifications are measured and specified at the SC242 connector pins.
16.FC-PGA/FC-PGA2 packages only
17.These are the tolerance requirements across a 20 MHz bandwidth at the FC-PGA/FC-PGA2 socket pins on
the solder side of the motherboard. VCCCORE must return to within the static voltage specification within
100
s after a transient event.
18.PGA only
19.S.E.P Package and FC-PGA/FC-PGA2 Packages only
20.These processors implement independent VTT and VCCCORE power planes.
21.For processors with CPUID of 0686h, the ISGNT is 2.5 A.
22.For processors with CPUID of 0686h, the ISLP is 2.5 A.
23.For processors with CPUID of 0686h, the IDSLP is 2.2 A.
24.This specification is applicable only for processor frequencies of 933 MHz and above.
25.This Intel Celeron processor is a Telecommunications and Embedded Group (TSEG) and Embedded Intel
Architecture Division (EID) product only.
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