参数资料
型号: C8051F226R
厂商: Silicon Laboratories Inc
文件页数: 8/146页
文件大小: 0K
描述: IC 8051 MCU 8K FLASH 48TQFP
标准包装: 1
系列: C8051F2xx
核心处理器: 8051
芯体尺寸: 8-位
速度: 25MHz
连通性: SPI,UART/USART
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 32
程序存储器容量: 8KB(8K x 8)
程序存储器类型: 闪存
RAM 容量: 1.25K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.6 V
数据转换器: A/D 32x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-TQFP
包装: 剪切带 (CT)
其它名称: 336-1010-1
C8051F2xx
Rev. 1.6
105
14.2. General Purpose Port I/O
Each I/O port is accessed through a corresponding special function register (SFR) that is both byte
addressable and bit addressable. When writing to a port, the value written to the SFR is latched to main-
tain the output data value at each pin. When reading, the logic levels of the port’s input pins are returned
regardless of the PRTnMX settings (i.e., even when the pin is assigned to another signal by the MUX, the
Port Register can always still read its corresponding Port I/O pin), provided its pin is configured for digital
input mode. The exception to this is the execution of the read-modify-write instructions. The read-modify-
write instructions when operating on a port SFR are the following: ANL, ORL, XRL, JBC, CPL, INC, DEC,
DJNZ and MOV, CLR or SETB, when the destination is an individual bit in a port SFR. For these instruc-
tions, the value of the register (not the pin) is read, modified, and written back to the SFR.
SFR Definition 14.4. P0: Port0 Register
Bits7–0: P0.[7:0]
(Write - Output appears on I/O pins per PRT0MX, PRT1MX, and PRT2MX Registers)
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding PRT0CF.n bit = 0)
(Read - Regardless of PRT0MX, PRT1MX, and PRT2MX Register settings).
0: P0.n pin is logic low.
1: P0.n pin is logic high.
SFR Definition 14.5. PRT0CF: Port0 Configuration Register
Bits7–0: PRT0CF.[7:0]: Output Configuration Bits for P0.7–P0.0 (respectively)
0: Corresponding P0.n Output mode is Open-Drain.
1: Corresponding P0.n Output mode is Push-Pull.
R/W
Reset Value
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
11111111
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
(bit addressable)
0x80
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xA4
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