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| 型号： | C9815DY |
| 英文描述： | Up to 5A ULDO linear regulator |
| 中文描述： | CPU系统时钟发生器| SSOP封装| 56PIN |塑料 |
| 文件页数： | 6/19页 |
| 文件大小： | 328K |
| 代理商： | C9815DY |
Low EMI Clock Generator for Intel
133MHz/2DIMM Chipset Systems
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07054 Rev. **
05/03/2001
Page 6 of 19
APPROVED PRODUCT
C9815
Power on Bi-Directional Pins
Power Up Condition:
Pin1 is a Power up bi-directional pin and is used for selecting the host frequency in page 1, table 1. During power-up of
the device, this pin is in input mode (see Fig 4, below), therefore; it is
considered input select pin, Sel2 internal to the IC.
After a settling time, the selection data is latch into the internal control register and this pin becomes a clock output.
-
Hi-Z Inputs
Toggle Outputs
ower Supply
amp
Select data is latched into register, then pin becomes a REF clock output signal.
Fig.4
REF / SEL2
(Pin 1)
VDD Rail
Strapping Resistor Options:
The power up bi-directional pin has a large value pull-
down (50K
+/20
K
)
, therefore, a selection
“
0
”
is the
default. If the system uses a slow power supply (over
10mS settling time), then
it is recommended
to use an
external Pull-down (Rdn) in order to insure a low
selection. In this case, the designer may choose one of
two configurations, see Fig.5A and 5B.
Fig. 5A represents an additional pull down resistor 5K
connected from the pin to the power line, which allows a
faster down to a high level.
If a selection
“
1
”
is desired, then a jumper is placed on
JP1 to a 1 K
resistor as shown in Fig.5A. Please note
the selection resistors (Rup and Rdn
)
are placed before
the Damping resistor (Rd) close to the pin.
Fig. 5B represent a single resistor 5K
connected to a
3-way jumper, JP2. When a
“
1
”
selection is desired, a
jumper is placed between leads1 and 3. When a
“
0
”
selection is desired, a jumper is placed between leads 1
and 2.
Load
Load
Fig. 5A
Fig. 5B
Vdd
Vdd
Rup
1K
Rd
IMI C9815
Bidirectional
JP1
JUMPER
JP2
3 W ay Jum per
Rsel
5K
Rd
IMI C9815
Bidirectional
Rdn
5K
1
2
3
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